Chunyuan Zhang

147 papers A* 4A 11B 10C 17Misc 5Journal 49Unranked 51

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	MCPT-Solver: An Monte Carlo Algorithm Solver Using MTJ Devices for Particle Transport Problems. CoRR Siqing Fu, Lizhou Wu, Tiejun Li, Xuchao Xie, Chunyuan Zhang, Sheng Ma, Jianmin Zhang, Yuhan Tang, Jixuan Tang
2025	A	`conf`	NeuroPDE: A Neuromorphic PDE Solver Based on Spintronic and Ferroelectric Devices. ICCAD Siqing Fu, Lizhou Wu, Tiejun Li, Chunyuan Zhang, Sheng Ma, Jianmin Zhang, Yuhan Tang, Jixuan Tang
2025	J	`jnl`	NeuroPDE: A Neuromorphic PDE Solver Based on Spintronic and Ferroelectric Devices. CoRR Siqing Fu, Lizhou Wu, Tiejun Li, Chunyuan Zhang, Sheng Ma, Jianmin Zhang, Yuhan Tang, Jixuan Tang
2024	—	`conf`	AFMA-Track: Adaptive Fusion of Motion and Appearance for Robust Multi-object Tracking. ICPR (16) Wei Liao, Lei Luo, Chunyuan Zhang
2024	—	`conf`	Cell DINO: End-to-End Cell Segmentation and Tracking with Transformer. BIBM Wei Liao, Lei Luo, Changjian Wang, Chunyuan Zhang
2024	J	`jnl`	SparGD: A Sparse GEMM Accelerator with Dynamic Dataflow. ACM Trans. Design Autom. Electr. Syst. Bo Wang, Sheng Ma, Shengbai Luo, Lizhou Wu, Jianmin Zhang, Chunyuan Zhang, Tiejun Li
2024	J	`jnl`	Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices. CoRR Siqing Fu, Tiejun Li, Chunyuan Zhang, Sheng Ma, Jianmin Zhang, Lizhou Wu
2023	J	`jnl`	RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device. CoRR Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu
2023	J	`jnl`	RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device. IEEE Trans. Very Large Scale Integr. Syst. Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu
2023	J	`jnl`	Recursive least squares method for training and pruning convolutional neural networks. Appl. Intell. Tianzong Yu, Chunyuan Zhang, Meng Ma, Yuan Wang
2022	C	`conf`	BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. ICCD Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang
2022	J	`jnl`	BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. CoRR Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang
2022	J	`jnl`	Recursive Least Squares Advantage Actor-Critic Algorithms. CoRR Yuan Wang, Chunyuan Zhang, Tianzong Yu, Meng Ma
2022	J	`jnl`	Recursive Least Squares Policy Control with Echo State Network. CoRR Chunyuan Zhang, Chao Liu, Qi Song, Jie Zhao
2022	J	`jnl`	Recursive Least Squares for Training and Pruning Convolutional Neural Networks. CoRR Tianzong Yu, Chunyuan Zhang, Yuan Wang, Meng Ma, Qi Song
2021	B	`conf`	Automatic mapping and code optimization for OpenCL kernels on FT-matrix architecture (WIP paper). LCTES Xiaolei Zhao, Mei Wen, Zhaoyun Chen, Yang Shi, Chunyuan Zhang
2021	J	`jnl`	Minibatch Recursive Least Squares Q-Learning. Comput. Intell. Neurosci. Chunyuan Zhang, Qi Song, Zeng Meng
2021	J	`jnl`	Revisiting Recursive Least Squares for Training Deep Neural Networks. CoRR Chunyuan Zhang, Qi Song, Hui Zhou, Yigui Ou, Hongyao Deng, Laurence Tianruo Yang
2021	—	`conf`	SAI: Self-Adjusting Incremental Quantile Estimation for Sparse Training of Neural Networks on Hardware Accelerators. HPCC/DSS/SmartCity/DependSys Jianchao Yang, Mei Wen, Minjin Tang, Junzhong Shen, Chunyuan Zhang
2020	J	`jnl`	Deep Learning Research and Development Platform: Characterizing and Scheduling with QoS Guarantees on GPU Clusters. IEEE Trans. Parallel Distributed Syst. Zhaoyun Chen, Wei Quan, Mei Wen, Jianbin Fang, Jie Yu, Chunyuan Zhang, Lei Luo
2020	—	`conf`	Efficient Mini-batch Training for Echo State Networks. ICRAI Chunyuan Zhang, Chao Liu, Jie Zhao
2020	J	`jnl`	Efficient Parallel TLD on CPU-GPU Platform for Real-Time Tracking. KSII Trans. Internet Inf. Syst. Zhaoyun Chen, Dafei Huang, Lei Luo, Mei Wen, Chunyuan Zhang
2020	J	`jnl`	Estimation of the parameters of a weighted nuclear norm model and its application in image denoising. Inf. Sci. Hongyao Deng, Jinsong Tao, Xiuli Song, Chunyuan Zhang
2020	—	`conf`	HybridSketch: A Memory-centric Precise Approach for Flow Measurement. ICC Xiaolei Zhao, Mei Wen, Minjin Tang, Qun Huang, Chunyuan Zhang
2020	C	`conf`	Incremental Deployment of Programmable Switches for Sketch-based Network Measurement. ISCC Yang Shi, Mei Wen, Chunyuan Zhang
2020	—	`conf`	Optimized HybridSketch: More Efficient with Analysis and Algorithm. ICA3PP (1) Xiaolei Zhao, Mei Wen, Minjin Tang, Qun Huang, Chunyuan Zhang
2020	J	`jnl`	P4 to FPGA-A Fast Approach for Generating Efficient Network Processors. IEEE Access Zhuang Cao, Huayou Su, Qianming Yang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2020	A	`conf`	Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement. FPGA Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang
2020	J	`jnl`	Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Junzhong Shen, You Huang, Mei Wen, Chunyuan Zhang
2020	B	`conf`	Towards High-Efficiency Data Centers via Job-Aware Network Scheduling. ICPP Yang Shi, Mei Wen, Chunyuan Zhang
2020	A*	`conf`	Towards Memory-Efficient Streaming Processing with Counter-Cascading Sketching on FPGA. DAC Minjin Tang, Mei Wen, Junzhong Shen, Xiaolei Zhao, Chunyuan Zhang
2020	—	`conf`	Towards a Deep-Pipelined Architecture for Accelerating Deep GCN on a Multi-FPGA Platform. ICA3PP (1) Qixuan Cheng, Mei Wen, Junzhong Shen, Deguang Wang, Chunyuan Zhang
2019	J	`jnl`	A Fast Approach for Generating Efficient Parsers on FPGAs. Symmetry Zhuang Cao, Huiguo Zhang, Junnan Li, Mei Wen, Chunyuan Zhang
2019	A	`conf`	Accelerating 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System. FPGA Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang
2019	B	`conf`	An Efficient Design Flow for Accelerating Complicated-connected CNNs on a Multi-FPGA Platform. ICPP Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2019	J	`jnl`	Application-Oriented Network Scheduling With Metaflow. IEEE Access Yang Shi, Jiawei Fei, Mei Wen, Chunyuan Zhang
2019	A	`conf`	GENIE: QoS-guided Dynamic Scheduling for CNN-based Tasks on SME Clusters. DATE Zhaoyun Chen, Lei Luo, Haoduo Yang, Jie Yu, Mei Wen, Chunyuan Zhang
2019	J	`jnl`	Interleaved Sketch: Toward Consistent Network Telemetry for Commodity Programmable Switches. IEEE Access Zijun Hang, Mei Wen, Yang Shi, Chunyuan Zhang
2019	C	`conf`	KVSwitch: An In-network Load Balancer for Key-Value Stores. ISCC Yang Shi, Jiawei Fei, Mei Wen, Chunyuan Zhang
2019	—	`conf`	Poster Abstract: A Template-based Framework for Generating Network Processor in FPGA. INFOCOM Workshops Zhuang Cao, Huayou Su, Qianming Yang, Mei Wen, Chunyuan Zhang
2019	—	`conf`	Poster Abstract: Deep Learning Workloads Scheduling with Reinforcement Learning on GPU Clusters. INFOCOM Workshops Zhaoyun Chen, Lei Luo, Wei Quan, Mei Wen, Chunyuan Zhang
2019	—	`conf`	SACC: Configuring Application-Level Cache Intelligently for In-Memory Database Based on Long Short-Term Memory. HPCC/SmartCity/DSS Jiawei Fei, Yang Shi, Mei Wen, Chunyuan Zhang
2019	—	`conf`	SWAP: a sliding window algorithm for in-network packet measurement. HP3C Zijun Hang, Yang Shi, Mei Wen, Wei Quan, Chunyuan Zhang
2019	A*	`conf`	Scale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System. DAC Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang
2019	—	`conf`	TBSW: Time-Based Sliding Window Algorithm for Network Traffic Measurement. HPCC/SmartCity/DSS Zijun Hang, Yang Shi, Mei Wen, Chunyuan Zhang
2019	C	`conf`	Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs. ISCAS Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2019	J	`jnl`	Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs. CoRR Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2018	A	`conf`	Design of Practical Experiences to Improve Student Understanding of Efficiency and Scalability Issues in High Performance Computing: (Abstract Only). SIGCSE Juan Chen, Li Shen, Jianping Yin, Chunyuan Zhang
2018	J	`jnl`	HPGraph: High-Performance Graph Analytics with Productivity on the GPU. Sci. Program. Haoduo Yang, Huayou Su, Qiang Lan, Mei Wen, Chunyuan Zhang
2018	—	`conf`	High performance graph analytics with productivity on hybrid CPU-GPU platforms. HP3C Haoduo Yang, Huayou Su, Qiang Lan, Mei Wen, Chunyuan Zhang
2018	J	`jnl`	MALMM: A multi-array architecture for large-scale matrix multiplication on FPGA. IEICE Electron. Express You Huang, Junzhong Shen, Yuran Qiao, Mei Wen, Chunyuan Zhang
2018	—	`conf`	Multiple CNN-based Tasks Scheduling across Shared GPU Platform in Research and Development Scenarios. HPCC/SmartCity/DSS Zhaoyun Chen, Lei Luo, Wei Quan, Yang Shi, Jie Yu, Mei Wen, Chunyuan Zhang
2018	—	`conf`	Parallel programming course development based on parallel computational thinking. TURC Juan Chen, Li Shen, Jianping Yin, Chunyuan Zhang
2018	C	`conf`	Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. ISCAS Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
2018	J	`jnl`	Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. CoRR Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
2018	A	`conf`	Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA. FPGA Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang
2017	J	`jnl`	A Highly Parallel and Scalable Motion Estimation Algorithm with GPU for HEVC. Sci. Program. Yun-gang Xue, Huayou Su, Ju Ren, Mei Wen, Chunyuan Zhang, Li-Quan Xiao
2017	J	`jnl`	Applying Detection Proposals to Visual Tracking for Scale and Aspect Ratio Adaptability. Int. J. Comput. Vis. Dafei Huang, Lei Luo, Zhaoyun Chen, Mei Wen, Chunyuan Zhang
2017	—	`conf`	DCC: Distributed Cache Consistency. ICPCSEE (2) Shenling Liu, Chunyuan Zhang, Yujiao Chen
2017	J	`jnl`	Exploiting a depth context model in visual tracking with correlation filter. Frontiers Inf. Technol. Electron. Eng. Zhaoyun Chen, Lei Luo, Dafei Huang, Mei Wen, Chunyuan Zhang
2017	J	`jnl`	FPGA-accelerated deep convolutional neural networks for high throughput and energy efficiency. Concurr. Comput. Pract. Exp. Yuran Qiao, Junzhong Shen, Tao Xiao, Qianming Yang, Mei Wen, Chunyuan Zhang
2017	J	`jnl`	High Performance Implementation of 3D Convolutional Neural Networks on a GPU. Comput. Intell. Neurosci. Qiang Lan, Zelong Wang, Mei Wen, Chunyuan Zhang, Yijie Wang
2017	C	`conf`	Optimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA. NPC Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang
2017	—	`conf`	RVNet: A fast and high energy efficiency network packet processing system on RISC-V. ASAP Yanpeng Wang, Mei Wen, Chunyuan Zhang, Jie Lin
2017	—	`conf`	Winograd Algorithm for 3D Convolution Neural Networks. ICANN (2) Zelong Wang, Qiang Lan, Hongjun He, Chunyuan Zhang
2016	B	`conf`	Enabling Tissue-Scale Cardiac Simulations Using Heterogeneous Computing on Tianhe-2. ICPADS Johannes Langguth, Qiang Lan, Namit Gaur, Xing Cai, Mei Wen, Chunyuan Zhang
2016	—	`conf`	Improve security and availability for cloud storage. CCIS Shenling Liu, Chunyuan Zhang, Le Bo
2016	J	`jnl`	Kernel Recursive Least-Squares Temporal Difference Algorithms with Sparsification and Regularization. Comput. Intell. Neurosci. Chunyuan Zhang, Qingxin Zhu, Xinzheng Niu
2016	—	`conf`	Multikernel Recursive Least-Squares Temporal Difference Learning. ICIC (3) Chunyuan Zhang, Qingxin Zhu, Xinzheng Niu
2015	J	`jnl`	A Computational Model of the Short-Cut Rule for 2D Shape Decomposition. IEEE Trans. Image Process. Lei Luo, Chunhua Shen, Xinwang Liu, Chunyuan Zhang
2015	J	`jnl`	An analytical GPU performance model for 3D stencil computations from the angle of data traffic. J. Supercomput. Huayou Su, Xing Cai, Mei Wen, Chunyuan Zhang
2015	J	`jnl`	Communication-hiding programming for clusters with multi-coprocessor nodes. Concurr. Comput. Pract. Exp. Xinnan Dong, Mei Wen, Jun Chai, Xing Cai, Mandan Zhao, Chunyuan Zhang
2015	A	`conf`	Enable Scale and Aspect Ratio Adaptability in Visual Tracking with Detection Proposals. BMVC Dafei Huang, Lei Luo, Mei Wen, Zhaoyun Chen, Chunyuan Zhang
2015	J	`jnl`	Enabling a Uniform OpenCL Device View for Heterogeneous Platforms. IEICE Trans. Inf. Syst. Dafei Huang, Changqing Xun, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai, Qianming Yang
2015	B	`conf`	Fast tracking via context depth model learning. ICIP Zhaoyun Chen, Lei Luo, Mei Wen, Chunyuan Zhang
2015	J	`jnl`	Towards simulation of subcellular calcium dynamics at nanometre resolution. Int. J. High Perform. Comput. Appl. Jun Chai, Johan Hake, Nan Wu, Mei Wen, Xing Cai, Glenn Terje Lines, Jing Yang, Huayou Su, Chunyuan Zhang, Xiangke Liao
2014	J	`jnl`	A Computational Model of the Short-Cut Rule for 2D Shape Decomposition. CoRR Lei Luo, Chunhua Shen, Xinwang Liu, Chunyuan Zhang
2014	A	`conf`	A fault detection mechanism in a Data-flow scheduled Multithreaded processor. DATE Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
2014	—	`conf`	Automated Transformation of GPU-Specific OpenCL Kernels Targeting Performance Portability on Multi-Core/Many-Core CPUs. Euro-Par Dafei Huang, Mei Wen, Changqing Xun, Dong Chen, Xing Cai, Yuran Qiao, Nan Wu, Chunyuan Zhang
2014	J	`jnl`	High efficient sedimentary basin simulations on hybrid CPU-GPU clusters. Clust. Comput. Mei Wen, Huayou Su, Wenjie Wei, Nan Wu, Xing Cai, Chunyuan Zhang
2014	B	`conf`	Rethread: A Low-Cost Transient Fault Recovery Scheme for Multithreaded Processors. ARES Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
2014	—	`conf`	Utilizing Multiple Xeon Phi Coprocessors on One Compute Node. ICA3PP (2) Xinnan Dong, Jun Chai, Jing Yang, Mei Wen, Nan Wu, Xing Cai, Chunyuan Zhang, Zhaoyun Chen
2013	—	`conf`	ACF: Networks-on-Chip Deadlock Recovery with Accurate Detection and Elastic Credit. APPT Nan Wu, Yuran Qiao, Mei Wen, Chunyuan Zhang
2013	J	`jnl`	Accelerating thread-intensive and explicit memory management programs with dynamic partial reconfiguration. J. Supercomput. Qianming Yang, Mei Wen, Nan Wu, Chunyuan Zhang
2013	—	`conf`	An Adaptive Low-Overhead Mechanism for Dependable General-Purpose Many-Core Processors. ICT-EurAsia Wentao Jia, Rui Li, Chunyuan Zhang
2013	—	`conf`	Automatic Mapping Single-Device OpenCL Program to Heterogeneous Multi-device Platform. HPCC/EUC Dong Chen, Changqing Xun, Dafei Huang, Mei Wen, Chunyuan Zhang
2013	—	`conf`	Device View Redundancy: An Adaptive Low-Overhead Fault Tolerance Mechanism for Many-Core System. HPCC/EUC Wentao Jia, Chunyuan Zhang, Jian Fu
2013	J	`jnl`	Efficient fine-grained shared buffer management for multiple OpenCL devices. J. Zhejiang Univ. Sci. C Changqing Xun, Dong Chen, Qiang Lan, Chunyuan Zhang
2013	C	`conf`	On the GPU Performance of 3D Stencil Computations Implemented in OpenCL. ISC Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai
2013	B	`conf`	On the GPU-CPU Performance Portability of OpenCL for 3D Stencil Computations. ICPADS Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai
2013	—	`conf`	On-demand thread-level fault detection in a concurrent programming environment. ICSAMOS Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
2013	Misc	`conf`	Performance of Sediment Transport Simulations on NVIDIA's Kepler Architecture. ICCS Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai
2013	J	`jnl`	Resource-efficient utilization of CPU/GPU-based heterogeneous supercomputers for Bayesian phylogenetic inference. J. Supercomput. Jun Chai, Huayou Su, Mei Wen, Xing Cai, Nan Wu, Chunyuan Zhang
2013	J	`jnl`	Shape Similarity Analysis by Self-Tuning Locally Constrained Mixed-Diffusion. IEEE Trans. Multim. Lei Luo, Chunhua Shen, Chunyuan Zhang, Anton van den Hengel
2013	J	`jnl`	Simulating Cardiac Electrophysiology in the Era of GPU-Cluster Computing. IEICE Trans. Inf. Syst. Jun Chai, Mei Wen, Nan Wu, Dafei Huang, Jing Yang, Xing Cai, Chunyuan Zhang, Qianming Yang
2013	—	`conf`	Solving the Cardiac Model Using Multi-core CPU and Many Integrated Cores (MIC). HPCC/EUC Jing Yang, Jun Chai, Mei Wen, Nan Wu, Chunyuan Zhang
2012	B	`conf`	A Parallel H.264 Encoder with CUDA: Mapping and Evaluation. ICPADS Nan Wu, Mei Wen, Huayou Su, Ju Ren, Chunyuan Zhang
2012	—	`conf`	Architecting Dependable Many-Core Processors Using Core-Level Dynamic Redundancy. ISCTCS Wentao Jia, Chunyuan Zhang, Jian Fu, Rui Li
2012	B	`conf`	Extending BORPH for shared memory reconfigurable computers. FPL Changqing Xun, Mei Wen, Nan Wu, Chunyuan Zhang, Hayden Kwok-Hay So
2012	—	`conf`	Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression. HPCC-ICESS Yi He, Maolin Guan, Chunyuan Zhang, Tian Tian, Qianming Yang
2012	J	`jnl`	Identification method of independent module for dynamic fault tree with interdependent basic events and repeated events. Int. J. Comput. Appl. Technol. Hong-Lin Zhang, Chunyuan Zhang, Dong Liu
2012	C	`conf`	Improving Performance of GPU Specific OpenCL Program on CPUs. PDCAT Qiang Lan, Changqing Xun, Mei Wen, Huayou Su, Lifang Liu, Chunyuan Zhang
2012	A	`conf`	Parallelization Design of Irregular Algorithms of Video Processing on GPUs. ICME Huayou Su, Jun Chai, Mei Wen, Ju Ren, Chunyuan Zhang
2012	A	`conf`	The masala machine: accelerating thread-intensive and explicit memory management programs with dynamically reconfigurable FPGAs (abstract only). FPGA Mei Wen, Nan Wu, Qianming Yang, Chunyuan Zhang, Liang Zhao
2012	C	`conf`	Using 1000+ GPUs and 10000+ CPUs for Sedimentary Basin Simulations. CLUSTER Mei Wen, Huayou Su, Wenjie Wei, Nan Wu, Xing Cai, Chunyuan Zhang
2011	Misc	`conf`	A Multilevel Parallel Intra Coding for H.264/AVC Based on CUDA. ICIG Huayou Su, Nan Wu, Chunyuan Zhang, Mei Wen, Ju Ren
2011	—	`conf`	A high-efficient software parallel CAVCL encoder based on GPU. TSP Huayou Su, Chunyuan Zhang, Jun Chai, Mei Wen, Nan Wu, Ju Ren
2011	A*	`conf`	High-efficient software parallel CAVLC encoder based on programmable stream processor. ACM Multimedia Huayou Su, Chunyuan Zhang, Jun Chai, Mei Wen, Nan Wu, Ju Ren
2011	J	`jnl`	Tiled Multi-Core Stream Architecture. Trans. High Perform. Embed. Archit. Compil. Nan Wu, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan, Chunyuan Zhang
2010	—	`conf`	A Parallel Streaming Motion Estimation for Real-Time HD H.264 Encoding on Programmable Processors. FCST Ju Ren, Mei Wen, Chunyuan Zhang, Huayou Su, Yi He, Nan Wu
2010	—	`conf`	Importance Measure Method for Dynamic Fault Tree Based on Isomorphic Node. ICICA (LNCS) Hong-Lin Zhang, Chunyuan Zhang, Dong Liu, Gui-Wu Xie
2010	C	`conf`	SAT: A Stream Architecture Template for Embedded Applications. CIT Qianming Yang, Nan Wu, Mei Wen, Yi He, Huayou Su, Chunyuan Zhang
2010	C	`conf`	Software Managed Instruction Scratchpad Memory Optimization in Stream Architecture Based on Hot Code Analysis of Kernels. DSD Yi He, Ju Ren, Mei Wen, Qianming Yang, Nan Wu, Chunyuan Zhang
2009	Misc	`conf`	Cache streamization for high performance stream processor. HiPC Nan Wu, Mei Wen, Ju Ren, Yi He, Changqing Xun, Wei Wu, Chunyuan Zhang
2009	—	`conf`	Interference-aware Broadcast Routing and Channel Assignment for Multi-Radio Wireless Mesh Networks. VTC Fall Li Li, Bin Qin, Chunyuan Zhang
2009	—	`conf`	Joint Channel Width Adaptation, Topology Control, and Routing for Multi-Radio Multi-Channel Wireless Mesh Networks. CCNC Li Li, Chunyuan Zhang
2009	J	`jnl`	Optimal Channel Width Adaptation, Logical Topology Design, and Routing in Wireless Mesh Networks. EURASIP J. Wirel. Commun. Netw. Li Li, Chunyuan Zhang
2009	B	`conf`	QoS-aware on-demand channel width adaptation protocols for multi-radio ad-hoc networks. WCNC Li Li, Chunyuan Zhang, Yanhua Li
2009	—	`conf`	Software parallel CAVLC encoder based on stream processing. ESTIMedia Ju Ren, Yi He, Wei Wu, Mei Wen, Nan Wu, Chunyuan Zhang
2009	A*	`conf`	Streaming HD H.264 encoder on programmable processors. ACM Multimedia Nan Wu, Mei Wen, Wei Wu, Ju Ren, Huayou Su, Changqing Xun, Chunyuan Zhang
2008	A	`conf`	FPGA-based Equivalent Simulation Technology (FEST) for clustered stream architecture. ACSAC Yi He, Ju Ren, Qianming Yang, Mei Wen, Nan Wu, Chunyuan Zhang
2008	—	`conf`	Improving the Quality of Graduate Education by Association Rules Analysis. FSKD (4) Yi Fang, Chunyuan Zhang
2008	—	`conf`	Load scheduling: Reducing pressure on distributed register files for free. ASP-DAC Mei Wen, Nan Wu, Maolin Guan, Chunyuan Zhang
2008	J	`jnl`	On-Chip Memory System Optimization Design for the FT64 Scientific Stream Accelerator. IEEE Micro Mei Wen, Nan Wu, Chunyuan Zhang, Qianming Yang, Ju Ren, Yi He, Wei Wu, Jun Chai, Maolin Guan, Changqing Xun
2008	J	`jnl`	Transform coding on programmable stream processors. J. Supercomput. Haiyan Li, Chunyuan Zhang, Li Li, Ju Ren
2007	Misc	`conf`	A Fault-Tolerant Real-Time Scheduling Algorithm in Software Fault-Tolerant Module. International Conference on Computational Science (4) Dong Liu, Weiyan Xing, Rui Li, Chunyuan Zhang, Haiyan Li
2007	—	`conf`	A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision. Asia-Pacific Computer Systems Architecture Conference Nan Wu, Qianming Yang, Mei Wen, Yi He, Changqing Xun, Chunyuan Zhang
2007	—	`conf`	Broadcasting in Multi-Radio Multi-Channel and Multi-Hop Wireless Networks. MMNS Li Li, Bin Qin, Chunyuan Zhang
2007	—	`conf`	Cut Sequence Set Generation for Fault Tree Analysis. ICESS Dong Liu, Weiyan Xing, Chunyuan Zhang, Rui Li, Haiyan Li
2007	C	`conf`	Efficient Broadcasting in Multi-radio Multi-channel and Multi-hop Wireless Networks Based on Self-pruning. HPCC Li Li, Bin Qin, Chunyuan Zhang, Haiyan Li
2007	Misc	`conf`	FT64: Scientific Computing with Streams. HiPC Mei Wen, Nan Wu, Chunyuan Zhang, Wei Wu, Qianming Yang, Changqing Xun
2007	C	`conf`	Quantification of Cut Sequence Set for Fault Tree Analysis. HPCC Dong Liu, Chunyuan Zhang, Weiyan Xing, Rui Li, Haiyan Li
2007	—	`conf`	Stream Algorithm for 4*4 Integer Transform in H.264. MUE Haiyan Li, Chunyuan Zhang, Ju Ren, Li Li, Dong Liu
2007	—	`conf`	The Design on SEU-Tolerant Information Processing System of the On-Board-Computer. APPT Ying Huang, Chunyuan Zhang, Dong Liu, Yi Li, Sheng-xin Weng
2006	C	`conf`	A Streaming Implementation of Transform and Quantization in H.264. HPCC Haiyan Li, Chunyuan Zhang, Li Li, Ming Pang
2006	—	`conf`	Analysis and Performance Results of a fluid dynamics Application on MASA Stream Processor. ACIS-ICIS Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Zhang
2006	—	`conf`	Optimization and Evaluating of StreamYGX2 on MASA Stream Processor. Asia-Pacific Computer Systems Architecture Conference Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Zhang
2006	C	`conf`	Prediction-Table Based Fault-Tolerant Real-Time Scheduling Algorithm. PDCAT Dong Liu, Chunyuan Zhang, Rui Li
2006	—	`conf`	Register Allocation on Stream Processor with Local Register File. Asia-Pacific Computer Systems Architecture Conference Nan Wu, Mei Wen, Ju Ren, Yi He, Chunyuan Zhang
2006	—	`conf`	The Process of Synchronization in Dual Redundant Fault-Tolerant System. IIP Dong Liu, Chunyuan Zhang, Rui Li
2005	—	`conf`	A Stream Architecture Supporting Multiple Stream Execution Models. Asia-Pacific Computer Systems Architecture Conference Nan Wu, Mei Wen, Haiyan Li, Li Li, Chunyuan Zhang
2005	—	`conf`	Accelerated Motion Estimation of H.264 on Imagine Stream Processor. ICIAR Haiyan Li, Mei Wen, Chunyuan Zhang, Nan Wu, Li Li, Changqing Xun
2005	J	`jnl`	Multiple-Morphs Adaptive Stream Architecture. J. Comput. Sci. Technol. Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang
2004	C	`conf`	A Case of SCMP with TLS. ISPA Jianzhuang Lu, Chunyuan Zhang, Zhiying Wang, Yun Cheng, Dan Wu
2004	C	`conf`	A Parallel Reed-Solomon Decoder on the Imagine Stream Processor. ISPA Mei Wen, Chunyuan Zhang, Nan Wu, Haiyan Li, Li Li
2004	—	`conf`	Multiple-Dimension Scalable Adaptive Stream Architecture. Asia-Pacific Computer Systems Architecture Conference Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang
1997	—	`conf`	The study of parallel simulation processing based on MPP technology. APDC Yang Shi, Chenxi Zhang, Chunyuan Zhang