Chung Hon Lam

11 papers C 1Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2016 J jnl
Recent Progress in Phase-Change Memory Technology.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Geoffrey W. Burr, Matthew J. BrightSky, Abu Sebastian, Huai-Yu Cheng, Jau-Yi Wu, Sangbum Kim, Norma E. Sosa, Nikolaos Papandreou, Hsiang-Lan Lung, Haralampos Pozidis, Evangelos Eleftheriou, Chung Hon Lam
2013 J jnl
A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gael F. Close, Urs Frey, Jack Morrish, Richard Jordan, Scott C. Lewis, Tom Maffitt, M. J. BrightSky, Christoph Hagleitner, Chung Hon Lam, Evangelos Eleftheriou
2013 J jnl
Nanoscale electronic synapses using phase change devices.
ACM J. Emerg. Technol. Comput. Syst.
Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, Matthew J. Breitwisch, Geoffrey W. Burr, Roger Cheek, Kailash Gopalakrishnan, Simone Raoux, Charles T. Rettner, Alvaro Padilla, Alejandro G. Schrott, Rohit S. Shenoy, Bülent N. Kurdi, Chung Hon Lam, Dharmendra S. Modha
2011 C conf
Programming algorithms for multilevel phase-change memory.
ISCAS
Nikolaos Papandreou, Haralampos Pozidis, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Evangelos Eleftheriou
2010 — conf
Multilevel phase-change memory.
ICECS
Nikolaos Papandreou, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Haralampos Pozidis, Evangelos Eleftheriou
2008 J jnl
Overview of candidate device technologies for storage-class memory.
IBM J. Res. Dev.
Geoffrey W. Burr, Bülent N. Kurdi, J. Campbell Scott, Chung Hon Lam, Kailash Gopalakrishnan, Rohit S. Shenoy
2008 J jnl
Phase-change random access memory: A scalable technology.
IBM J. Res. Dev.
Simone Raoux, Geoffrey W. Burr, Matthew J. Breitwisch, Charles T. Rettner, Yi-Chou Chen, Robert M. Shelby, Martin Salinga, Daniel Krebs, Shih-Hung Chen, Hsiang-Lan Lung, Chung Hon Lam
2008 J jnl
Transition-metal-oxide-based resistance-change memories.
IBM J. Res. Dev.
Siegfried F. Karg, Gerhard Ingmar Meijer, J. Georg Bednorz, Charles T. Rettner, Alejandro G. Schrott, Eric A. Joseph, Chung Hon Lam, Markus Janousch, Urs Staub, Fabio LaMattina, Santos F. Alvarado, Daniel Widmer, Richard Stutz, Ute Drechsler, Daniele Caimi
2005 — conf
A novel CMOS compatible embedded nonvolatile memory with zero process adder.
MTDT
Matthew J. Breitwisch, Chung Hon Lam, Jeffrey B. Johnson, Steven W. Mittl, Jian W. Zhu
2003 J jnl
Ultralow-power SRAM technology.
IBM J. Res. Dev.
Randy W. Mann, W. W. (Bill) Abadeer, Matthew J. Breitwisch, O. Bula, Jeff S. Brown, Bryant C. Colwill, Peter E. Cottrell, William T. Crocco Jr., Stephen S. Furkay, Michael J. Hauser, Terence B. Hook, Dennis Hoyniak, James M. Johnson, Chung Hon Lam, Rebecca D. Mih, J. Rivard, Atsushi Moriwaki, E. Phipps, Christopher S. Putnam, BethAnn Rainey, James J. Toomey, Mohammad Imran Younus
1995 J jnl
A half-micron CMOS logic generation.
IBM J. Res. Dev.
Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman