Chung-Ho Chen

76 papers A* 2B 2C 18Misc 2Journal 30Unranked 22
YearRankTypeTitle / Venue / Authors
2025 C conf
Improve GPGPU Front-end Efficiency Via Inter-Warp Instruction Sharing.
ISCAS
Yu-Yu Hsiao, Liang-Chou Chen, Chung-Ho Chen
2025 — conf
Modified Wallace-Tree Architecture Design and Implementation for High-Speed Multiplier.
ICECS
Bing-Huang Wu, Tung-Chin Tsai, Ming-Hwa Sheu, Chung-Ho Chen
2024 — conf
A Two-Phase Multi-Class Botnet Labeling Approach for Real-World Traffic.
ICAIIC
Ta-Chun Lo, Shan-Hong Yang, Jyh-Biau Chang, Chung-Ho Chen, Ce-Kuen Shieh
2020 C conf
Optimization of Stride Prefetching Mechanism and Dependent Warp Scheduling on GPGPU.
ISCAS
Tsung-Han Tsou, Dun-Jie Chen, Sheng-Yang Hung, Yu-Hsiang Wang, Chung-Ho Chen
2019 — conf
Development of an Open ISA GPGPU for Edge Device Machine Learning Applications.
ICUFN
Yu-Xiang Su, Jhi-Han Jheng, Dun-Jie Chen, Chung-Ho Chen
2019 — conf
Micro Darknet For Inference: ESL reference for inference accelerator design.
ISOCC
Min-Zhi Ji, Wei-Chung Tseng, Ting-Jia Wu, Bo-Rong Lin, Chung-Ho Chen
2018 — conf
A glance of the CASLab HSAIL SIMT GPU for OpenCL and TensorFlow applications.
VLSI-DAT
Chung-Ho Chen
2018 J jnl
Enabling SIMT Execution Model on Homogeneous Multi-Core System.
ACM Trans. Archit. Code Optim.
Kuan-Chung Chen, Chung-Ho Chen
2018 C conf
Kernel Aware Warp Scheduler.
ISCAS
Sen-Chih Tsai, Yu-Xiang Su, Yu-Han Chin, Wei-Zhong Ceng, Chung-Ho Chen
2017 J jnl
A Processor and Cache Online Self-Testing Methodology for OS-Managed Platform.
IEEE Trans. Very Large Scale Integr. Syst.
Ching-Wen Lin, Chung-Ho Chen
2017 — conf
Processor shield for L1 data cache software-based on-line self-testing.
ASP-DAC
Ching-Wen Lin, Chung-Ho Chen
2016 — conf
A processor shield for software-based on-line self-test.
APCCAS
Ching-Wen Lin, Chung-Ho Chen
2016 — conf
A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling.
ASP-DAC
Liang-Ying Lu, Ching-Yao Chang, Zhao-Hong Chen, Bo-Ting Yeh, Tai-Hua Lu, Peng-Yu Chen, Pin-Hao Tang, Kuen-Jong Lee, Lih-Yih Chiou, Soon-Jyh Chang, Chien-Hung Tsai, Chung-Ho Chen, Jai-Ming Lin
2016 C conf
Dynamic SIMD re-convergence with paired-path comparison.
ISCAS
Yun-Chi Huang, Kuan-Chieh Hsu, Wan-Shan Hsieh, Chen-Chieh Wang, Chia-Han Lu, Chung-Ho Chen
2015 C conf
A memory-efficient NoC system for OpenCL many-core platform.
ISCAS
Chien-Hsuan Yen, Chung-Ho Chen, Kuan-Chung Chen
2014 C conf
An OpenCL runtime system for a heterogeneous many-core virtual platform.
ISCAS
Kuan-Chung Chen, Chung-Ho Chen
2014 C conf
Unambiguous I-cache testing using software-based self-testing methodology.
ISCAS
Ching-Wen Lin, Chung-Ho Chen
2014 J jnl
Virtualization Technology for TCP/IP Offload Engine.
IEEE Trans. Cloud Comput.
En-Hao Chang, Chen-Chieh Wang, Chien-Te Liu, Kuan-Chung Chen, Chung-Ho Chen
2013 J jnl
A System-Level Network Virtual Platform for IPsec Processor Development.
IEICE Trans. Inf. Syst.
Chen-Chieh Wang, Chung-Ho Chen
2013 C conf
CASL hypervisor and its virtualization platform.
ISCAS
Chien-Te Liu, Kuan-Chung Chen, Chung-Ho Chen
2013 C conf
Using condition flag prediction to improve the performance of out-of-order processors.
ISCAS
Tzu-Hsuan Hsu, Ching-Wen Lin, Chung-Ho Chen
2012 — conf
A SIMD-accelerated software rendering pipeline for 3D graphics processing.
APCCAS
Eric Shianda Yu, Chung-Ho Chen
2012 C conf
NetVP: A system-level NETwork Virtual Platform for network accelerator development.
ISCAS
Chen-Chieh Wang, Sheng-Hsin Lo, Yao-Ning Liu, Chung-Ho Chen
2012 C conf
Tile-based GPU optimizations through ESL full system simulation.
ISCAS
Hsu-Yao Huang, Chi-Yuan Huang, Chung-Ho Chen
2011 — conf
A low cost, low power, high scalability and dependability processor-cluster platform.
SIES
Yi-Li Lin, Wei-Tso Chen, Alvin W. Y. Su, Da-Wei Chang, Chung-Ho Chen
2011 J jnl
Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores.
IEEE Trans. Very Large Scale Integr. Syst.
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
2011 J jnl
Energy-Efficient Trace Reuse Cache for Embedded Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Yi-Ying Tsai, Chung-Ho Chen
2011 J jnl
Optimum profit model based on order quantity, product price, and process quality level.
Expert Syst. Appl.
Chung-Ho Chen, Chih-Lun Lu
2011 J jnl
Optimum profit model considering production, quality and sale problem.
Int. J. Syst. Sci.
Chung-Ho Chen, Chih-Lun Lu
2010 C conf
Full system simulation with QEMU: An approach to multi-view 3D GPU design.
ISCAS
Shye-Tzeng Shen, Shin-Ying Lee, Chung-Ho Chen
2010 J jnl
Optimal design of expected lifetime and warranty period for product with quality loss and inspection error.
Expert Syst. Appl.
Chung-Ho Chen, Wan-Lin Chang
2010 J jnl
Using one EWMA chart to jointly monitor the process mean and variance.
Comput. Stat.
Michael Boon Chong Khoo, Zhang Wu, Chung-Ho Chen, Kah Wai Yeong
2009 C conf
Full System Simulation and Verification Framework.
IAS
Jing-Wun Lin, Chen-Chieh Wang, Chin-Yao Chang, Chung-Ho Chen, Kuen-Jong Lee, Yuan-Hua Chu, Jen-Chieh Yeh, Ying-Chuan Hsiao
2009 J jnl
Optimum process mean and manufacturing quantity settings for serial production system under the quality loss and rectifying inspection plan.
Comput. Ind. Eng.
Chung-Ho Chen, Michael B. C. Khoo
2009 J jnl
The determination of optimum process mean and screening limits based on quality loss function.
Expert Syst. Appl.
Chung-Ho Chen, Hui-Sung Kao
2008 — conf
A Software-Based Test Methodology for Direct-Mapped Data Cache.
ATS
Yi-Cheng Lin, Yi-Ying Tsai, Kuen-Jong Lee, Cheng-Wei Yen, Chung-Ho Chen
2008 C conf
A hybrid self-testing methodology of processor cores.
ISCAS
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
2008 Misc conf
A hybrid software-based self-testing methodology for embedded processor.
SAC
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
2008 C conf
Address compression for scalable load/store queue implementation.
ISCAS
Yi-Ying Tsai, Chia-Jung Hsu, Chung-Ho Chen
2008 C conf
Avoiding unnecessary frame memory access and multi-frame motion estimation computation in H.264/AVC.
ISCAS
Wei-Cheng Lin, Chung-Ho Chen
2008 J jnl
Configurable VLSI Architecture for Deblocking Filter in H.264/AVC.
IEEE Trans. Very Large Scale Integr. Syst.
Chung-Ming Chen, Chung-Ho Chen
2008 J jnl
Economic Production Run Length and warranty Period for Product with Weibull Lifetime.
Asia Pac. J. Oper. Res.
Chung-Ho Chen
2008 J jnl
Frame Buffer Access Reduction for MPEG Video Decoder.
IEEE Trans. Circuits Syst. Video Technol.
Wei-Cheng Lin, Chung-Ho Chen
2008 Misc conf
Power-efficient and scalable load/store queue design via address compression.
SAC
Yi-Ying Tsai, Chia-Jung Hsu, Chung-Ho Chen
2007 — conf
A data-reuse scheme for avoiding unnecessary memory accesses in MPEG-4 ASP video decoder.
SoCC
Wei-Cheng Lin, Chung-Ho Chen
2007 J jnl
An Efficient Pipeline Architecture for Deblocking Filter in H.264/AVC.
IEICE Trans. Inf. Syst.
Chung-Ming Chen, Chung-Ho Chen
2007 J jnl
Determining the optimum process mean based on quadratic quality loss function and rectifying inspection plan.
Eur. J. Oper. Res.
Chung-Ho Chen, Min-Tsai Lai
2007 J jnl
Economic manufacturing quantity, optimum process mean, and economic specification limits setting under the rectifying inspection plan.
Eur. J. Oper. Res.
Chung-Ho Chen, Min-Tsai Lai
2007 B conf
Reduction of Frame Memory Accesses and Motion Estimation Computations in MPEG Video Encoder.
ICCCN
Wei-Cheng Lin, Chung-Ho Chen
2007 J jnl
Scalable Dynamic Instruction Scheduler through Wake-Up Spatial Locality.
IEEE Trans. Computers
Chung-Ho Chen, Kuo-Su Hsiao
2007 J jnl
Software-Based Self-Testing With Multiple-Level Abstractions for Soft Processor Cores.
IEEE Trans. Very Large Scale Integr. Syst.
Chung-Ho Chen, Chih-Kai Wei, Tai-Hua Lu, Hsun-Wei Gao
2006 B conf
Design of a Giga-bit Hardware Accelerator for the iSCSI Initiator.
LCN
Chung-Ho Chen, Yi-Cheng Chung, Chen-Hua Wang, Han-Chiang Chen
2006 J jnl
Economic design of variable sampling intervals
Expert Syst. Appl.
Chao-Yu Chou, Chun-Hua Chen, Chung-Ho Chen
2006 C conf
Exploring reusable frame buffer data for MPEG-4 video decoding.
ISCAS
Wei-Cheng Lin, Chung-Ho Chen
2006 C conf
Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling.
ICCD
Kuo-Su Hsiao, Chung-Ho Chen
2006 J jnl
On the bootstrap confidence intervals of the process incapability index C
Reliab. Eng. Syst. Saf.
Chao-Yu Chou, Yu-Chang Lin, Chun-Lang Chang, Chung-Ho Chen
2006 J jnl
Wake-Up Logic Optimizations Through Selective Match and Wakeup Range Limitation.
IEEE Trans. Very Large Scale Integr. Syst.
Kuo-Su Hsiao, Chung-Ho Chen
2005 — conf
An Efficient Architecture for Deblocking Filter in H.264/AVC Video Coding.
Computer Graphics and Imaging
Chung-Ming Chen, Chung-Ho Chen
2005 — conf
An efficient VLSI architecture for edge filtering in H.264/AVC.
Circuits, Signals, and Systems
Chung-Ming Chen, Chung-Ho Chen
2005 — conf
An efficient wakeup design for energy reduction in high-performance superscalar processors.
Conf. Computing Frontiers
Kuo-Su Hsiao, Chung-Ho Chen
2003 — conf
An effective SDRAM power mode management scheme for performance and energy sensitive embedded systems.
ASP-DAC
Ning-Yaun Ker, Chung-Ho Chen
2001 J jnl
A Systematic Approach for Parallel CRC Computations.
J. Inf. Sci. Eng.
Ming-Der Shieh, Ming-Hwa Sheu, Chung-Ho Chen, Hsin-Fu Lo
2001 — conf
Parameterized MAC unit implementation.
ASP-DAC
Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen
1999 J jnl
An Easy-to-Use Approach for Practical Bus-Based System Design.
IEEE Trans. Computers
Chung-Ho Chen, Feng-Fu Lin
1999 J jnl
Fault Containment in Cache Memories for TMR Redundant Processor Systems.
IEEE Trans. Computers
Chung-Ho Chen, Arun K. Somani
1997 — conf
An enhanced DLX-based superscalar system simulator.
WCAE@HPCA
Chung-Ho Chen, Akida Wu
1997 A* conf
Microarchitecture Support for Improving the Performance of Load Target Prediction.
MICRO
Chung-Ho Chen, Akida Wu
1996 J jnl
Architecture Technique Trade-Offs Using Mean Memory Delay Time.
IEEE Trans. Computers
Chung-Ho Chen, Arun K. Somani
1996 J jnl
Cache write generate for parallel image processing on shared memory architectures.
IEEE Trans. Image Process.
Craig M. Wittenbrink, Arun K. Somani, Chung-Ho Chen
1995 J jnl
Proteus: A reconfigurable computational network for computer vision.
Mach. Vis. Appl.
Robert M. Haralick, Arun K. Somani, Craig M. Wittenbrink, Robert Johnson, Kenneth Cooper, Linda G. Shapiro, Ihsin T. Phillips, Jenq-Neng Hwang, William Cheung, Yung Hsi Yao, Chung-Ho Chen, Larry Yang, Brian Daugherty, Bob Lorbeski, Kent Loving, Tom Miller, Larye Parkins, Steve Soos
1994 — conf
A Cache Protocol for Error Detection and Recovery in Fault-Tolerant Computing Systems.
FTCS
Chung-Ho Chen, Arun K. Somani
1994 A* conf
A Unified Architectural Tradeoff Methodology.
ISCA
Chung-Ho Chen, Arun K. Somani
1992 — conf
Effects of Cache Traffic on Shared Bus Multiprocessor Systems.
ICPP (1)
Chung-Ho Chen, Arun K. Somani
1992 — conf
Proteus: a reconfigurable computational network for computer vision.
ICPR (4)
Robert M. Haralick, Arun K. Somani, Craig M. Wittenbrink, Robert Johnson, Kenneth Cooper, Linda G. Shapiro, Ihsin T. Phillips, Jenq-Neng Hwang, William Cheung, Yung Hsi Yao, Chung-Ho Chen, Larry Yang, Brian Daugherty, Bob Lorbeski, Kent Loving, Tom Miller, Larye Parkins, Steve Soos
1991 — conf
Proteus System Architecture and Organization.
IPPS
Arun K. Somani, Craig M. Wittenbrink, Robert M. Haralick, Linda G. Shapiro, Jenq-Neng Hwang, Chung-Ho Chen, Robert Johnson, Kenneth Cooper
1982 J jnl
An Algebraic Model of Arithmetic Codes.
IEEE Trans. Computers
Chung-Ho Chen