Chung-Bin Wu

24 papers C 2Journal 6Unranked 16
YearRankTypeTitle / Venue / Authors
2023 — conf
System Integration and Optimization of AI Hardware Acceleration Architecture for Object Detection.
ICCE-Taiwan
Chung-Bin Wu, Yi-Yen Lai, Yen-Ren Hou
2022 C conf
AI Crowd Control Detection System Implemented on FPGA Hardware Development Platform.
ICCE
Chung-Bin Wu, Yu-Hu Wu, Yi-Yen Lai
2022 — conf
Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology.
MCSoC
Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu
2022 — conf
Extensible and Modularized Processing Unit Design and Implementation for AI Accelerator.
AICAS
Chung-Bin Wu, Yu-Kuan Hsiao, Wei-Hsuan Chang
2022 — conf
Hetero Layer Fusion Based Architecture Design and Implementation for of Deep Learning Accelerator.
ICCE-TW
Chung-Bin Wu, Rui-Feng Wu, Tzu-Wei Chan
2022 — conf
Quantized Lite Convolutional Neural Network Hardware Accelerator Design with FPGA for Face Direction Recognition.
ICCE-TW
Ko-Yi Jiang, Hsing-Yao Wang, Chung-Bin Wu, Yin-Tsung Hwang, Chih-Peng Fan
2021 — conf
Reconfigurable Deep Learning Accelerator Hardware Architecture Design for Sparse CNN.
ICCE-TW
Chung-Bin Wu, Chung-Hsuan Chen, Chen-Peng Kuan
2021 — conf
iAMEC, an Intelligent Autonomous Mover for Navigation in Indoor People Rich Environments.
AICAS
Yin-Tsung Hwang, Kuan-Hong Chen, Chih-Peng Fan, Yong-Kang Lai, Chung-Bin Wu, Hsiao-Ping Tsai, Wei-Liang Lin, Kuang-Hao Lin
2020 — conf
Cordic Based Hardware Implementation for Object Region Layer of Yolo V2.
ICCE-TW
Chung-Bin Wu, Yu-Kuan Hsiao
2020 — conf
High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator.
ISOCC
Chung-Bin Wu, Yin-Tsung Hwang, Yu-Cheng Hsueh, Yu-Kuan Hsiao
2020 — conf
Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator.
GCCE
Chung-Bin Wu, Ching-Shun Wang, Yu-Kuan Hsiao
2019 — conf
High Throughput Hardware Implementation for Deep Learning AI Accelerator.
ICCE-TW
Chung-Bin Wu, Yu-Cheng Hsueh, Ching-Shun Wang, Yen-Chi Lai
2019 — conf
Low Complexity License Plate Recognition System.
ISOCC
Chung-Bin Wu, Guan-Jing Chen, Chien-Cheng Yu
2019 J jnl
Ultra-Low Complexity Block-Based Lane Detection and Departure Warning System.
IEEE Trans. Circuits Syst. Video Technol.
Chung-Bin Wu, Li-Hung Wang, Kuan-Chieh Wang
2017 J jnl
Hardware-and-memory-sharing architecture of deblocking filter for VP8 and H.264/AVC.
IEEE Trans. Consumer Electron.
Chung-Bin Wu, Li-Hung Wang, Yu-Lin Chou
2016 J jnl
A Fast Algorithm-Based Cost-Effective and Hardware-Efficient Unified Architecture Design of 4 × 4, 8 × 8, 16 × 16, and 32 × 32 Inverse Core Transforms for HEVC.
J. Signal Process. Syst.
Chia-Wei Chang, Hao-Fan Hsu, Chih-Peng Fan, Chung-Bin Wu, Robert Chen-Hao Chang
2015 — conf
Object-based stereo matching using adjustable-cross for depth estimation.
ICCE-TW
Li-Hung Wang, Kai-Lung Tsai, Chung-Bin Wu
2014 — conf
A real-time architecture of multiple features extraction for vehicle verification.
APCCAS
Li-Hung Wang, Chao-Kai Cheng, Chung-Bin Wu
2012 C conf
A hardware sharing architecture of deblocking filter for VP8 and H.264/AVC video coding.
ISCAS
Yu-Lin Chou, Chung-Bin Wu
2012 — conf
An efficient background extraction and object segmentation algorithm for realtime applications.
APCCAS
Hsin-Yi Wang, Li-Hung Wang, Chung-Bin Wu
2005 J jnl
DCT-Based Adaptive Thresholding Algorithm for Binary Motion Estimation.
IEEE Trans. Circuits Syst. Video Technol.
Chung-Bin Wu, Chin-Yuan Yao, Bin-Da Liu, Jar-Ferr Yang
2003 J jnl
A fuzzy-based impulse noise detection and cancellation for real-time processing in video receivers.
IEEE Trans. Instrum. Meas.
Chung-Bin Wu, Bin-Da Liu, Jar-Ferr Yang
2003 J jnl
Adaptive postprocessors with DCT-based block classifications.
IEEE Trans. Circuits Syst. Video Technol.
Chung-Bin Wu, Bin-Da Liu, Jar-Ferr Yang
2001 — conf
Adaptive postprocessors with DCT-based block classifications.
ISCAS (5)
Chung-Bin Wu, Bin-Da Liu, Jar-Ferr Yang