Chun Xue - RankMe

39 papers A 2B 2C 7Misc 4Journal 13Unranked 11

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Characterizing and Optimizing LDPC Performance on 3D NAND Flash Memories. ACM Trans. Archit. Code Optim. Qiao Li, Yu Chen, Guanyu Wu, Yajuan Du, Min Ye, Xinbiao Gan, Jie Zhang, Zhirong Shen, Jiwu Shu, Chun Xue
2017	J	`jnl`	Data re-allocation enabled cache locking for embedded systems. J. Syst. Archit. Chun Xue, Keni Qiu, Weigong Zhang, Jing Wang, Yuanchao Xu, Mengying Zhao
2013	Misc	`conf`	Bio-inspired ultra lower-power neuromorphic computing engine for embedded systems. CODES+ISSS Beiye Liu, Miao Hu, Hai Li, Yiran Chen, Chun Xue
2012	J	`jnl`	General Loop Fusion Technique with Improved Timing Performance and Minimal Code Size. Int. J. Comput. Their Appl. Meilin Liu, Qingfeng Zhuge, Chun Xue, Edwin Hsing-Mean Sha
2011	Misc	`conf`	Optimizing Memory Cost with Loop Transformations. CATA Meilin Liu, Andrew McClain, Chun Xue
2009	J	`jnl`	Energy minimization for heterogeneous wireless sensor networks. J. Embed. Comput. Meikang Qiu, Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha
2009	Misc	`conf`	Loop Fusion Technique with Minimal Memory Cost via Retiming. CATA Meilin Liu, Edwin Hsing-Mean Sha, Chun Xue, Meikang Qiu
2009	B	`conf`	Reprogramming with Minimal Transferred Data on Wireless Sensor Network. MASS Jingtong Hu, Chun Xue, Yi He, Edwin Hsing-Mean Sha
2007	A	`conf`	Energy minimization with soft real-time and DVS for uniprocessor and multiprocessor embedded systems. DATE Meikang Qiu, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha
2007	J	`jnl`	Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping. J. VLSI Signal Process. Chun Xue, Zili Shao, Edwin Hsing-Mean Sha
2007	C	`conf`	Parallel Network Intrusion Detection on Reconfigurable Platforms. EUC Chun Xue, Zili Shao, Meilin Liu, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2007	J	`jnl`	Real-Time Dynamic Voltage Loop Scheduling for Multi-Core Embedded Systems. IEEE Trans. Circuits Syst. II Express Briefs Zili Shao, Meng Wang, Ying Chen, Chun Xue, Meikang Qiu, Laurence T. Yang, Edwin Hsing-Mean Sha
2007	C	`conf`	Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. EUC Guochen Hua, Meng Wang, Zili Shao, Hui Liu, Chun Xue
2007	B	`conf`	Real-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors. RTCSA Meng Wang, Zili Shao, Chun Xue, Edwin Hsing-Mean Sha
2007	J	`jnl`	Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP. J. VLSI Signal Process. Meikang Qiu, Zhiping Jia, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha
2006	J	`jnl`	Algorithms and analysis of scheduling for loops with minimum switching. Int. J. Comput. Sci. Eng. Zili Shao, Qingfeng Zhuge, Meilin Liu, Chun Xue, Edwin Hsing-Mean Sha, Bin Xiao
2006	J	`jnl`	Design optimization and space minimization considering timing and code size via retiming and unfolding. Microprocess. Microsystems Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, Meikang Qiu, Edwin Hsing-Mean Sha
2006	C	`conf`	Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network. EUC Mei Kang Qiu, Chun Xue, Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha
2006	J	`jnl`	Hardware/software optimization for array & pointer boundary checking against buffer overflow attacks. J. Parallel Distributed Comput. Zili Shao, Jiannong Cao, Keith C. C. Chan, Chun Xue, Edwin Hsing-Mean Sha
2006	—	`conf`	Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture. ICPADS (1) Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2006	C	`conf`	Loop Striping: Maximize Parallelism for Nested Loops. EUC Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2006	J	`jnl`	Loop scheduling with timing and switching-activity minimization for VLIW DSP. ACM Trans. Design Autom. Electr. Syst. Zili Shao, Bin Xiao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha
2006	—	`conf`	Optimizing Timing and Code Size Using Maximum Direct Loop Fusion. PDCS Meilin Liu, Chun Xue, Edwin Hsing-Mean Sha
2006	J	`jnl`	Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software. IEEE Trans. Computers Zili Shao, Chun Xue, Qingfeng Zhuge, Mei Kang Qiu, Bin Xiao, Edwin Hsing-Mean Sha
2006	—	`conf`	Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability. ASAP Mei Kang Qiu, Chun Xue, Qingfeng Zhuge, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha
2005	—	`conf`	Efficient Array & Pointer Bound Checking Against Buffer Overflow Attacks via Hardware/Software. ITCC (1) Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao
2005	J	`jnl`	Efficient Assignment and Scheduling for Heterogeneous DSP Systems. IEEE Trans. Parallel Distributed Syst. Zili Shao, Qingfeng Zhuge, Chun Xue, Edwin Hsing-Mean Sha
2005	—	`conf`	High-level synthesis for DSP applications using heterogeneous functional units. ASP-DAC Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
2005	Misc	`conf`	Iterational retiming: maximize iteration-level parallelism for nested loops. CODES+ISSS Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha
2005	C	`conf`	Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs. EUC Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Mei Kang Qiu, Edwin Hsing-Mean Sha
2005	—	`conf`	Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size. ISPAN Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Meikang Qiu, Edwin Hsing-Mean Sha
2005	—	`conf`	Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems. ICPADS (2) Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
2005	—	`conf`	Multi-level Loop Fusion with Minimal Code Size. PDCS Meilin Liu, Zili Shao, Chun Xue, Kevin F. Chen, Edwin Hsing-Mean Sha
2005	—	`conf`	Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems. IASTED PDCS Mei Kang Qiu, Meilin Liu, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Zili Shao
2005	—	`conf`	Optimizing DSP scheduling via address assignment with array and loop transformation. ICASSP (5) Chun Xue, Zili Shao, Ying Chen, Edwin Hsing-Mean Sha
2005	C	`conf`	Optimizing Nested Loops with Iterational and Instructional Retiming. EUC Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha
2004	A	`conf`	Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units. IPDPS Zili Shao, Qingfeng Zhuge, Yi He, Chun Xue, Meilin Liu, Edwin Hsing-Mean Sha
2004	C	`conf`	Optimizing Address Assignment for Scheduling Embedded DSPs. EUC Chun Xue, Zili Shao, Edwin Hsing-Mean Sha, Bin Xiao
2004	—	`conf`	Security Protection and Checking in Embedded System Integration Against Buffer Overflow Attacks. ITCC (1) Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao