Chun-Nan Liu

18 papers A 1C 2Misc 2Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2014 J jnl
Multi-core system performance prediction and analysis at the ESL.
Int. J. Comput. Sci. Eng.
Jen-Chieh Yeh, Chi-Hung Lin, Chun-Nan Liu
2013 — conf
A case study: 3-D stacked memory system architecture exploration by ESL virtual platform.
VLSI-DAT
Hsien-Ching Hsieh, Shr-Je Lin, Chun-Nan Liu, Jen-Chieh Yeh, Shing-Wu Tung, Ding-Ming Kwai
2013 — conf
Baseband design and software-defined-radio implementation for LTE femtocell.
ASCC
Dung-Rung Hsieh, De-Jhen Huang, Jen-Yuan Hsu, Chieh-Yu Kao, Ming-Che Lin, Chun-Nan Liu, Pangan Ting
2012 — conf
Improvement of Multimedia Performance Based on 3-D Stacking Memory Architecture and Software Refinement.
HPCC-ICESS
Yi-Fa Sun, Chun-Nan Liu, Tse-Min Chen, Hsien-Ching Hsieh, Jen-Chieh Yeh, Yung-Chang Chang
2011 J jnl
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part II: Application Programming.
J. Signal Process. Syst.
Jia-Ming Chen, Chun-Nan Liu, Jen-Kuei Yang, Shau-Yin Tseng, Wei-Kuan Shih, An-Yeu Wu
2011 C conf
Parallel Integral Image Generation Algorithm on Multi-core System.
ISPA
Yi-Ta Wu, Yih-Tyng Wu, Chao-Yi Cho, Shau-Yin Tseng, Chun-Nan Liu, Chung-Ta King
2011 Misc conf
Real-Time Photo Sensor Dead Pixel Detection for Embedded Devices.
DICTA
Chao-Yi Cho, Tse-Min Chen, Wen-Shan Wang, Chun-Nan Liu
2011 Misc conf
System-level design exploration for 3-D stacked memory architectures.
CODES+ISSS
Chi-Hung Lin, Wen-Tsan Hsieh, Hsien-Ching Hsieh, Chun-Nan Liu, Jen-Chieh Yeh
2009 — conf
A 1.4 MHz 0.21 mW MPEG-2/4 AAC single chip decoder.
CICC
Tsung-Han Tsai, Chun-Nan Liu, Hsueh-Yi Lin, Hsing-Chuang Liu, Chia-Ying Wu
2009 J jnl
Low-Power System Design for MPEG-2/4 AAC Audio Decoder Using Pure ASIC Approach.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tsung-Han Tsai, Chun-Nan Liu
2008 J jnl
A Low-Latency Multi-layer Prefix Grouping Technique for Parallel Huffman Decoding of Multimedia Standards.
J. Signal Process. Syst.
Tsung-Han Tsai, Chun-Nan Liu
2008 C conf
Optimization techniques of AAC decoder on PACDSP VLIW processor.
ISCAS
Chun-Nan Liu, Jui Hong Hung, Tsung-Han Tsai
2008 J jnl
VLIW-aware software optimization of AAC decoder on parallel architecture core DSP (PACDSP) processor.
IEEE Trans. Consumer Electron.
Tsung-Han Tsai, Chun-Nan Liu, Jui Hong Hung
2007 J jnl
A Configurable Common Filterbank Processor for Multi-Standard Audio Decoder.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tsung-Han Tsai, Chun-Nan Liu
2005 J jnl
A Hardware/Software Co-Design of MP3 Audio Decoder.
J. VLSI Signal Process.
Tsung-Han Tsai, Ya-Chau Yang, Chun-Nan Liu
2005 J jnl
A hardware/software co-design case study on MPEG AAC audio decoder.
Int. J. Embed. Syst.
Tsung-Han Tsai, Chun-Nan Liu
2005 — conf
SoC platform based design of MPEG-2/4 AAC audio decoder.
ISCAS (3)
Chun-Nan Liu, Tsung-Han Tsai
2003 A conf
A low power VLSI implementation for variable length decoder in MPEG-1 layer III.
ICME
Tsung-Han Tsai, Wen-Cheng Chen, Chun-Nan Liu