Chun-Gi Lyuh - RankMe

15 papers A* 1A 2B 1C 2Journal 2Unranked 7

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	AIWareK: Compiling PyTorch Model for AI Processor Using MLIR Framework. AICAS Hyunjeong Kwon, Hyun-Mi Kim, Chun-Gi Lyuh, Jin-Kyu Kim, Jinho Han, Youngsu Kwon
2022	—	`conf`	ArtBrain-K: AI Processor based-on 5-PetaFLOPS AI Server System. AICAS Jinho Han, Chun-Gi Lyuh, Kyeongsun Shin, Hyun-Mi Kim, Hyunjeong Kwon, Jaehoon Chung, Yong Cheol Peter Cho, Jinkyu Kim, Jeonghui Suk, Chan Kim, Minseok Choi, Youngsu Kwon
2022	—	`conf`	M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations. AICAS Won Jeon, Yong Cheol Peter Cho, Hyun-Mi Kim, Hyeji Kim, Jaehoon Chung, Ju-Yeob Kim, Miyoung Lee, Chun-Gi Lyuh, Jinho Han, Youngsu Kwon
2021	C	`conf`	HPC LINPACK Parameter Optimization on Homo-/Heterogeneous System of ARM Neoverse N1SDP. HPC Asia Je-Seok Ham, Yong Cheol Peter Cho, Ju-Yeob Kim, Chun-Gi Lyuh, Jin-Kyu Kim, Jinho Han, Youngsu Kwon
2021	C	`conf`	Live Demonstration: A Neural Processor for AI Acceleration. ISCAS Hyeji Kim, Jaehoon Chung, Kyoung-Seon Shin, Chun-Gi Lyuh, Hyun-Mi Kim, Chan Kim, Yong Cheol Peter Cho, Jeongmin Yang, Je-Seok Ham, Minseok Choi, Jinho Han, Youngsu Kwon
2019	—	`conf`	AI 32TFLOPS Autonomous Driving Processor on AI-Ware with Adaptive Power Saving. ISOCC Youngsu Kwon, Yong Cheol Peter Cho, Jeongmin Yang, Jaehoon Chung, Kyoung-Seon Shin, Jinho Han, Chan Kim, Chun-Gi Lyuh, Hyun-Mi Kim, In San Jeon, Min-Seok Choi
2019	—	`conf`	Function-Safe Vehicular AI Processor with Nano Core-In-Memory Architecture. AICAS Youngsu Kwon, Jeongmin Yang, Yong Cheol Peter Cho, Kyoung-Seon Shin, Jaehoon Chung, Jinho Han, Chun-Gi Lyuh, Hyun-Mi Kim, Chan Kim, Min-Seok Choi
2019	—	`conf`	Implementation of Yolo-v2 Image Recognition and Other Testbenches for a CNN Accelerator. ICCE-Berlin Chan Kim, In San Jeon, Young-Su Kwon, Hyun-Mi Kim, Chun-Gi Lyuh, Yong Cheol Peter Cho, Jeongmin Yang, Jaehoon Chung, Kyoung-Seon Shin, Jinho Han, Min-Seok Choi
2012	B	`conf`	Fast human detection using selective block-based HOG-LBP. ICIP Won-Jae Park, Dae-Hwan Kim, Suryanto, Chun-Gi Lyuh, Tae Moon Roh, Sung-Jea Ko
2004	J	`jnl`	Coupling-aware high-level interconnect synthesis [IC layout]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim
2004	A*	`conf`	Memory access scheduling and binding considering energy minimization in multi-bank memory systems. DAC Chun-Gi Lyuh, Taewhan Kim
2004	—	`conf`	Resource-constrained low-power bus encoding with crosstalk delay elimination. ASP-DAC Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
2003	J	`jnl`	High-level synthesis for low power based on network flow method. IEEE Trans. Very Large Scale Integr. Syst. Chun-Gi Lyuh, Taewhan Kim
2002	A	`conf`	Coupling-aware high-level interconnect synthesis for low power. ICCAD Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim
2001	A	`conf`	An Integrated Data Path Optimization for Low Power Based on Network Flow Method. ICCAD Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu