Chulhyun Park - RankMe

12 papers Journal 9Unranked 3

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A DTC-Based Snapshot ADPLL With Feedforward Fractional Spur Cancellation and Asynchronous Duty-Modulation Dithering DCO Achieving-71.6 dBc Fractional Spur in 65-nm CMOS Process. IEEE Access Kihoon Kwon, Sangwon Kim, Minseo Park, Jinhyuk Ahn, Gahyeon Lee, Joonho Gil, Chulhyun Park, Yunseong Eo, Hyungkyu Choi, Chulho Kang, Eun Seong Kim, Nam-Young Kim, Ramesh Harjani, Taehyoun Oh
2025	J	`jnl`	A 8.9 to 10-GHz -97.86-dBc Reference Spur Pulser-Free Continuous Charge Pump Sub-Sampling PLL With Fine-Tunable Dead-Zone Generator in 65-nm CMOS Process. IEEE Access Sangwon Kim, Kihoon Kwon, Minseo Park, Jinhyuk Ahn, Junseo Kim, Joonho Gil, Chulhyun Park, Yunseong Eo, Ramesh Harjani, Taehyoun Oh
2024	J	`jnl`	A 3.5 to 4.7-GHz Fractional-N ADPLL With a Low-Power Time-Interleaved GRO-TDC of 6.2-ps Resolution in 65-nm CMOS Process. IEEE Access Kyoung-Ub Cho, Joonho Gil, Chulhyun Park, Kyu-Jin Cho, Jae-Woo Shin, Eun Seong Kim, Yun Seong Eo, Ramesh Harjani, Nam-Young Kim, Taehyoun Oh
2021	—	`conf`	An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. VLSI Circuits Soon-Jae Kweon, Joonho Gil, Chulhyun Park, Sein Oh, Yoontae Jung, Injun Choi, Song-I Cheon, Hung Phan Dang, Ja-Hyuck Koo, Geunhoe Kim, Sohmyung Ha, Minkyu Je
2020	J	`jnl`	A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier. IEEE Trans. Circuits Syst. Chulhyun Park, Tao Chen, Kyoohyun Noh, Dadian Zhou, Suraj Prakash, Mohammadhossein Naderi Alizadeh, Aydin I. Karsilayan, Degang Chen, Randall L. Geiger, José Silva-Martínez
2020	J	`jnl`	A Low-Cost On-Chip Built-In Self-Test Solution for ADC Linearity Test. IEEE Trans. Instrum. Meas. Tao Chen, Chulhyun Park, Hao Meng, Dadian Zhou, José Silva-Martínez, Randall L. Geiger, Degang Chen
2020	J	`jnl`	An Ultrafast Multibit/Stage Pipelined ADC Testing and Calibration Method. IEEE Trans. Instrum. Meas. Tao Chen, Chulhyun Park, Shravan K. Chaganti, José Silva-Martínez, Randall L. Geiger, Degang Chen
2019	J	`jnl`	A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez
2019	J	`jnl`	A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. Mohammad H. Naderi, Chulhyun Park, Suraj Prakash, Martin Kinyua, Eric G. Soenen, José Silva-Martínez
2010	J	`jnl`	Outlier detection and countermeasure for hierarchical wireless sensor networks. IET Inf. Secur. Yi-Ying Zhang, Han-Chieh Chao, Min Chen, Lei Shu, Chulhyun Park, Myong-Soon Park
2010	—	`conf`	Service Differentiation Using Mobile Femtocell Virtualization. CCNC Eun Kyoung Paik, Sang-Hong Lee, Choongho Lee, Jinyoung Han, Chulhyun Park, Taekyoung Kwon, Yanghee Choi
2009	—	`conf`	Energy-Efficient Freshness Transmission Protocol in Wireless Sensor Networks. ScalCom-EmbeddedCom Lin He, Yiying Zhang, Chulhyun Park, Myong-Soon Park