Chuan Lin - RankMe

15 papers A* 1A 7Journal 5Unranked 2

Year	Rank	Type	Title / Venue / Authors
2007	—	`conf`	Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains. ASP-DAC Chuan Lin, Hai Zhou
2007	A	`conf`	Design closure driven delay relaxation based on convex cost network flow. DATE Chuan Lin, Aiguo Xie, Hai Zhou
2007	—	`conf`	Retiming for Synchronous Data Flow Graphs. ASP-DAC Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee
2007	J	`jnl`	Tradeoff Between Latch and Flop for Min-Period Sequential Circuit Designs With Crosstalk. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chuan Lin, Hai Zhou
2006	A	`conf`	A revisit to floorplan optimization by Lagrangian relaxation. ICCAD Chuan Lin, Hai Zhou, Chris C. N. Chu
2006	A*	`conf`	An efficient retiming algorithm under setup and hold constraints. DAC Chuan Lin, Hai Zhou
2006	J	`jnl`	Clustering for Processing Rate Optimization. IEEE Trans. Very Large Scale Integr. Syst. Chuan Lin, Jia Wang, Hai Zhou
2006	J	`jnl`	Optimal wire retiming without binary search. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chuan Lin, Hai Zhou
2005	A	`conf`	Clustering for processing rate optimization. ICCAD Chuan Lin, Jia Wang, Hai Zhou
2005	A	`conf`	Trade-off between latch and flop for min-period sequential circuit designs with crosstalk. ICCAD Chuan Lin, Hai Zhou
2005	J	`jnl`	Wire retiming as fixpoint computation. IEEE Trans. Very Large Scale Integr. Syst. Chuan Lin, Hai Zhou
2004	A	`conf`	Optimal wire retiming without binary search. ICCAD Chuan Lin, Hai Zhou
2004	J	`jnl`	Retiming for wire pipelining in system-on-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hai Zhou, Chuan Lin
2004	A	`conf`	Wire Retiming for System-on-Chip by Fixpoint Computation. DATE Chuan Lin, Hai Zhou
2003	A	`conf`	Retiming for Wire Pipelining in System-On-Chip. ICCAD Chuan Lin, Hai Zhou