Chu Yu

40 papers C 6Misc 1Journal 16Unranked 17
YearRankTypeTitle / Venue / Authors
2024 — conf
Generic Hardware Integrating Multiple Activation Functions for Deep Learning Applications.
ICCE-Taiwan
Chu Yu, Yi-Ching Hung
2023 — conf
Efficient Max Pooling Architecture with Zero-Padding for Convolutional Neural Networks.
GCCE
Chu Yu, Po-Hao Hung, Jing-Huan Hong, Han-Yu Chiang
2022 J jnl
Realization of a Real-Time Image Denoising System for Dashboard Camera Applications.
IEEE Trans. Consumer Electron.
Chu Yu, Li-Zhong Hou
2020 — conf
Friendly Appearance of Multiple Secret Sharing.
ICCE-TW
Heri Prasetyo, Chih-Hsien Hsia, Chu Yu, Albertus Ricky Wirawan
2019 — conf
Peer Group and Hybrid Vector Filter for Removal of Impulse Noise in Color Images.
ICCE-TW
Chu Yu, Mao-Wen Chen, Jin-Yu Chen, Jia-Hong Tang
2018 — conf
Three-Parallel Reed-Solomon Decoder using a Simplified Step-by-Step Algorithm.
GCCE
Chu Yu, Kuang-Hsiao Lee, Jin-Yu Chen, Mao-Wen Chen, Yi-An Chen
2017 C conf
Low-complexity twiddle factor generator for FFT processors.
ICCE
Chu Yu, Kuang-Hsiao Lee, Chien-Feng Kuo
2017 — conf
Lower bit-error-rate polar-LDPC concatenated coding for wireless communication systems.
GCCE
Chu Yu, Zhi-Hong Lin, Ting-Wei Hsu, Mao-Wen Chen, Yi-An Chen
2015 — conf
An effective spatial-temporal denoising approach for depth images.
DSP
Bor-Shing Lin, Wei-Ren Chou, Chu Yu, Po-Hsun Cheng, Po-Jui Tseng, Sao-Jie Chen
2015 J jnl
Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Chu Yu, Mao-Hsu Yen
2015 J jnl
Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box Designs".
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mao-Hsu Yen, Hung-Kuan Yen, Chu Yu
2015 — conf
Efficient image denoising scheme for removal of impulse noise.
GCCE
Li-Zhon Hou, Chien-Feng Kuo, Zhi-Hong Lin, Chu Yu
2015 J jnl
Two-Mode Reed-Solomon Decoder Using A Simplified Step-by-Step Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs
Chu Yu, Yu-Shan Su
2015 — conf
Variable code length soft-output decoder of polar codes.
DSP
Jung-Hong Po, Sao-Jie Chen, Chu Yu
2014 C conf
Improvement on a block-serial fully-overlapped QC-LDPC decoder for IEEE 802.11n.
ICCE
Chu Yu, Ho-Sheng Chuang, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen
2014 J jnl
Incorporation of perceptually adaptive QIM with singular value decomposition for blind audio watermarking.
EURASIP J. Adv. Signal Process.
Hwai-Tsu Hu, Hsien-Hsin Chou, Chu Yu, Ling-Yuan Hsu
2013 — conf
A 128/512/1024/2048-point pipeline FFT/IFFT architecture for mobile WiMAX.
GCCE
Chu Yu
2013 J jnl
A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.
VLSI Design
Mao-Hsu Yen, Chu Yu, Horng-Ru Liao, Chin-Fa Hsieh
2013 C conf
A dual-code-rate memoryless Viterbi decoder for wireless communication systems.
ICCE
Chu Yu, Yu-Shan Su, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen
2013 — conf
Design of a (255, 239) Reed-Solomon decoder using a simplified step-by-step algorithm.
ISCE
Yu-Shan Su, Chu Yu, Bor-Shing Lin, Po-Hsun Cheng, Sao-Jie Chen
2013 Misc conf
Hyper-Universal Switch Network for FPIC Design.
CISIS
Mao-Hsu Yen, Chu Yu, Yih-Hsia Lin, Chang-Hsien Chung
2012 J jnl
A HMM-WDLT framework for HNM-based voice conversion with parametric adjustment in formant bandwidth, duration and excitation.
Int. J. Speech Technol.
Hwai-Tsu Hu, Chu Yu
2012 J jnl
A Perceptually Adaptive QIM Scheme for Efficient Watermark Synchronization.
IEICE Trans. Inf. Syst.
Hwai-Tsu Hu, Chu Yu
2012 — conf
A Ubiquitous Scheme for a One-to-Many Switching Tunnel for Healthcare Utilization.
CICSyN
Po-Hsun Cheng, Shun-Hsiang Hu, Yu-Pao Lin, Hsiao-Chi Hsieh, Bor-Shing Lin, Chu Yu, Sao-Jie Chen
2012 J jnl
Design and implementation of a low-power OFDM receiver for wireless communications.
IEEE Trans. Consumer Electron.
Chu Yu, Chen-Hen Sung, Chien-Hung Kuo, Mao-Hsu Yen, Sao-Jie Chen
2012 C conf
Design of a low-power OFDM baseband receiver for wireless communications.
ICCE
Chu Yu, Chien-Hung Kuo, Chen-Hen Sung, Mao-Hsu Yen, Sao-Jie Chen
2011 J jnl
A low-power 64-point pipeline FFT/IFFT processor for OFDM applications.
IEEE Trans. Consumer Electron.
Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen
2010 — conf
ARAL-CR: An adaptive reasoning and learning cognitive radio platform.
ICSAMOS
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael J. Schulte, Yu Hen Hu
2010 J jnl
Low power design of phase-change memory based on a comprehensive model.
IET Comput. Digit. Tech.
Meng-Hsueh Chiang, Yi-Bo Liao, Jun-Tin Lin, Wei-Chou Hsu, Chu Yu, Pei-Chia Chiang, Y.-Y. Hsu, W.-H. Liu, Shyh-Shyuan Sheu, Keng-Li Su, Ming-Jer Kao, Ming-Jinn Tsai
2010 C conf
Perfect shuffling for cycle efficient puncturer and interleaver for software defined radio.
ISCAS
Jui-Chieh Lin, Minja Hsieh, Ming-Jung Fan-Chiang, Song-Yen Mao, Chu Yu, Sao-Jie Chen, Yu Hen Hu
2009 C conf
A 900 MHz to 5.2 GHz Dual-loop Feedback Multi-band LNA.
ISCAS
Jia-Wei Lin, Da-Tong Yen, Wei-Yi Hu, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen
2009 — conf
An instruction set architecture independent design method for embedded OFDM-based software defined transmitter.
SoCC
Jui-Chieh Lin, Minja Hsieh, Ming-Jung Fan-Chiang, Chu Yu, Sao-Jie Chen, Yu Hen Hu
2009 J jnl
Combining HMM and Weighted Deviation Linear Transformation for Highband Speech Parameter Estimation.
IEICE Trans. Inf. Syst.
Hwai-Tsu Hu, Chu Yu
2009 — conf
Parallel implementation of convolution encoder for software defined radio on DSP architecture.
ICSAMOS
Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu Hen Hu
2007 — conf
A compact pipelined architecture with high-throughput for context-based binary arithmetic coding.
SoCC
Chu Yu, Hwai-Tsu Hu
2003 J jnl
An efficient architecture for 2-D biorthogonal inverse discrete wavelet transforms.
IEEE Trans. Consumer Electron.
Chu Yu
2003 J jnl
Design and implantation of an ASIC architecture for 1.6 kbps speech synthesis.
IEEE Trans. Consumer Electron.
Chu Yu, Hwai-Tsu Hu, Chen-Yen Lin
2003 J jnl
Determination of glottal closure instants by harmonic superposition.
Signal Process.
Hwai-Tsu Hu, Shun-Ta Hsu, Chu Yu
1999 J jnl
Design of an efficient VLSI architecture for 2-D discrete wavelet transforms.
IEEE Trans. Consumer Electron.
Chu Yu, Sao-Jie Chen
1999 — conf
Efficient VLSI architecture for 2-D inverse discrete wavelet transforms.
ISCAS (3)
Chu Yu, Sao-Jie Chen