Chrysostomos Nicopoulos

114 papers A* 8A 13C 8Misc 2Journal 48Unranked 34

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Efficient Implementation of RISC-V Vector Permutation Instructions. ISVLSI Vasileios Titopoulos, George Alexakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	J	`jnl`	Efficient Implementation of RISC-V Vector Permutation Instructions. CoRR Vasileios Titopoulos, George Alexakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	J	`jnl`	MultiFile View: File-View-Based Isolation in a Single-User Environment to Protect User Data Files. IEEE Trans. Dependable Secur. Comput. Jione Choi, Junghee Lee, Gyuho Lee, Jaegwan Yu, Aran Park, Chrysostomos Nicopoulos
2025	J	`jnl`	Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors. CoRR Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	J	`jnl`	Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors. IEEE Trans. Computers Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	—	`conf`	Periodic Online Testing for Sparse Systolic Tensor Arrays. MOCAST Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	J	`jnl`	Periodic Online Testing for Sparse Systolic Tensor Arrays. CoRR Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	—	`conf`	Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs. CF Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025	J	`jnl`	Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs. CoRR Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024	J	`jnl`	A Hardware-Based Correct Execution Environment Supporting Virtual Memory. IEEE Access Daehyeon Lee, Ohsuk Shin, Yeonghyeon Cha, Junghee Lee, Taisic Yun, Jihye Kim, Hyunok Oh, Chrysostomos Nicopoulos, Sang Su Lee
2024	J	`jnl`	DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. IEEE Comput. Archit. Lett. Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024	J	`jnl`	DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. CoRR Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024	A	`conf`	IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. DATE Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2023	A	`conf`	ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. DATE Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
2023	J	`jnl`	Exploiting data encoding and reordering for low-power streaming in systolic arrays. Microprocess. Microsystems Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023	J	`jnl`	IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. CoRR Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2023	—	`conf`	Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. MOCAST Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023	J	`jnl`	Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. CoRR Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023	—	`conf`	Multi-Armed Bandits for Autonomous Test Application in RISC-V Processor Verification. MOCAST Giorgos Dimitrakopoulos, E. Kallitsounakis, Z. Takakis, A. Stefanidis, Chrysostomos Nicopoulos
2023	—	`conf`	Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. AICAS Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023	J	`jnl`	Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. CoRR Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023	J	`jnl`	Robustness of Artificial Neural Networks Based on Weight Alterations Used for Prediction Purposes. Algorithms Andreas G. Savva, Theocharis Theocharides, Chrysostomos Nicopoulos
2023	J	`jnl`	Streaming Dilated Convolution Engine. IEEE Trans. Very Large Scale Integr. Syst. Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2022	J	`jnl`	A Hardware-Assisted Heartbeat Mechanism for Fault Identification in Large-Scale IoT Systems. IEEE Trans. Dependable Secur. Comput. Mandrita Banerjee, Carlo Borges, Kim-Kwang Raymond Choo, Junghee Lee, Chrysostomos Nicopoulos
2022	J	`jnl`	ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. CoRR Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
2022	—	`conf`	FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks. ASAP Christodoulos Peltekis, Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2022	A*	`conf`	IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. MICRO Yiannakis Sazeides, Alex Gerber, Ron Gabor, Arkady Bramnik, George Papadimitriou, Dimitris Gizopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Karyofyllis Patsidis
2022	—	`conf`	LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride. ISVLSI Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2022	J	`jnl`	Low-Cost Online Convolution Checksum Checker. IEEE Trans. Very Large Scale Integr. Syst. Dionysios Filippas, Nikolaos Margomenos, Nikolaos Mitianoudis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2022	—	`conf`	Virtual-Channel Flow Control Across Mesochronous Clock Domains. MOCAST Giorgos Dimitrakopoulos, Anastasios Psarras, Chrysostomos Nicopoulos
2021	J	`jnl`	Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
2021	J	`jnl`	Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching. Integr. Dimitris Konstantinou, Chrysostomos Nicopoulos, Junghee Lee, Giorgos Dimitrakopoulos
2020	—	`conf`	2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD). DFT Yiannakis Sazeides, Arkady Bramnik, Ron Gabor, Chrysostomos Nicopoulos, Ramon Canal, Dimitris Konstantinou, Giorgos Dimitrakopoulos
2020	—	`conf`	Design Optimization by Fine-grained Interleaving of Local Netlist Transformations in Lagrangian Relaxation. ISPD Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
2020	J	`jnl`	Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment. IEEE Access Junghee Lee, Chrysostomos Nicopoulos, Gweonho Jeong, Jihye Kim, Hyunok Oh
2020	C	`conf`	RISC-V2: A Scalable RISC-V Vector Processor. ISCAS Karyofyllis Patsidis, Chrysostomos Nicopoulos, Georgios Ch. Sirakoulis, Giorgos Dimitrakopoulos
2020	C	`conf`	SmartFork: Partitioned Multicast Allocation and Switching in Network-on-Chip Routers. ISCAS Dimitrios Konstantinou, Chrysostomos Nicopoulos, Junghee Lee, Georgios Ch. Sirakoulis, Giorgos Dimitrakopoulos
2020	J	`jnl`	The Mesochronous Dual-Clock FIFO Buffer. IEEE Trans. Very Large Scale Integr. Syst. Dimitrios Konstantinou, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2020	J	`jnl`	Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dimitrios Mangiras, Apostolos Stefanidis, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2019	J	`jnl`	Automatic Generation of Peak-Power Traffic for Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2019	—	`conf`	Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage. IVSW Zacharias Takakis, Dimitrios Mangiras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2019	A	`conf`	Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core. DATE Ron Gabor, Yiannakis Sazeides, Arkady Bramnik, Alexandros Andreou, Chrysostomos Nicopoulos, Karyofyllis Patsidis, Dimitris Konstantinou, Giorgos Dimitrakopoulos
2019	—	`conf`	Multi-Armed Bandits for Autonomous Timing-driven Design Optimization. PATMOS Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2018	J	`jnl`	A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension. Microprocess. Microsystems Karyofyllis Patsidis, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2018	—	`conf`	Fast Estimations of Failure Probability Over Long Time Spans. NANOARCH Michail Noltsis, Panayiotis Englezakis, Eleni Maragkoudaki, Chrysostomos Nicopoulos, Dimitrios Rodopoulos, Francky Catthoor, Yiannakis Sazeides, Davide Zoni, Dimitrios Soudris
2018	—	`conf`	Hardware-Based Online Self-Diagnosis for Faulty Device Identification in Large-Scale IoT Systems. IoTDI Junghee Lee, Monobrata Debnath, Amit Patki, Mostafa Hasan, Chrysostomos Nicopoulos
2018	—	`conf`	Low-power dual-edge-triggered synchronous latency-insensitive systems. MOCAST Dimitris Konstantinou, Anastasios Psarras, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2017	J	`jnl`	A Design Space Exploration Framework for ANN-Based Fault Detection in Hardware Systems. J. Electr. Comput. Eng. Andreas G. Savva, Theocharis Theocharides, Chrysostomos Nicopoulos
2017	J	`jnl`	A Dual-Clock Multiple-Queue Shared Buffer. IEEE Trans. Computers Anastasios Psarras, Michalis Paschou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2017	J	`jnl`	BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers. J. Parallel Distributed Comput. Davide Zoni, Andrea Canidio, William Fornaciari, Panayiotis Englezakis, Chrysostomos Nicopoulos, Yiannakis Sazeides
2017	A	`conf`	HARPA: Tackling physically induced performance variability. DATE Nikolaos Zompakis, Michail Noltsis, Lorena Ndreu, Zacharias Hadjilambrou, Panayiotis Englezakis, Panagiota Nikolaou, Antoni Portero, Simone Libutti, Giuseppe Massari, Federico Sassi, Alessandro Bacchini, Chrysostomos Nicopoulos, Yiannakis Sazeides, Radim Vavrík, Martin Golasowski, Jiri Sevcík, Vít Vondrák, Francky Catthoor, William Fornaciari, Dimitrios Soudris
2017	J	`jnl`	HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs. ACM Trans. Design Autom. Electr. Syst. Jaehyun Park, Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Vinson Young, Junghee Lee, Jongman Kim
2017	—	`conf`	Low-cost congestion management in networks-on-chip using edge and in-network traffic throttling. AISTECS@HiPEAC Monobrata Debnath, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Wei-Ming Lin, Junghee Lee
2017	J	`jnl`	Networks-on-Chip With Double-Data-Rate Links. IEEE Trans. Circuits Syst. I Regul. Pap. Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	—	`conf`	A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors. ACM Great Lakes Symposium on VLSI Anastasios Psarras, Junghee Lee, Pavlos M. Mattheakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	J	`jnl`	An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures. ACM Trans. Archit. Code Optim. Kypros Chrysanthou, Panayiotis Englezakis, Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides, Giorgos Dimitrakopoulos
2016	A	`conf`	CrossOver: Clock domain crossing under virtual-channel flow control. DATE Michalis Paschou, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	J	`jnl`	PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Anastasios Psarras, Junghee Lee, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	—	`conf`	Powermax: an automated methodology for generating peak-power traffic in networks-on-chip. NOCS Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	—	`conf`	RapidLink: A network-on-chip architecture with double-data-rate links. ICECS Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	J	`jnl`	ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing. IEEE Trans. Computers Anastasios Psarras, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2016	J	`jnl`	Toward Multi-Layer Holistic Evaluation of System Designs. IEEE Comput. Archit. Lett. Marios Kleanthous, Yiannakis Sazeides, Emre Özer, Chrysostomos Nicopoulos, Panagiota Nikolaou, Zacharias Hadjilambrou
2015	J	`jnl`	ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip. IEEE Trans. Very Large Scale Integr. Syst. Ioannis Seitanidis, Anastasios Psarras, Kypros Chrysanthou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2015	—	`conf`	HARPA: Solutions for dependable performance under physically induced performance variability. SAMOS Dimitrios Rodopoulos, Simone Corbetta, Giuseppe Massari, Simone Libutti, Francky Catthoor, Yiannakis Sazeides, Chrysostomos Nicopoulos, Antoni Portero, Etienne Cappe, Radim Vavrík, Vít Vondrák, Dimitrios Soudris, Federico Sassi, Agnes Fritsch, William Fornaciari
2015	A	`conf`	PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation. DATE Anastasios Psarras, I. Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2015	J	`jnl`	Size-Aware Cache Management for Compressed Cache Architectures. IEEE Trans. Computers Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, Jongman Kim
2015	J	`jnl`	Subtleties of Run-Time VirtualAddress Stacks. IEEE Comput. Archit. Lett. Suk Chan Kang, Chrysostomos Nicopoulos, Ada Gavrilovska, Jongman Kim
2015	C	`conf`	Timing-resilient Network-on-Chip architectures. IOLTS Alexandros Panteloukas, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2015	C	`conf`	Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors. IOLTS Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
2014	J	`jnl`	Centaur: a hybrid network-on-chip architecture utilizing micro-network fusion. Des. Autom. Embed. Syst. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
2014	J	`jnl`	Designing Hybrid DRAM/PCM Main Memory Systems Utilizing Dual-Phase Compression. ACM Trans. Design Autom. Electr. Syst. Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Jongman Kim
2014	—	`conf`	ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture. NOCS I. Seitanidis, Anastasios Psarras, Emmanouil Kalligeros, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2014	A	`conf`	ElastiStore: An elastic buffer architecture for Network-on-Chip routers. DATE I. Seitanidis, Anastasios Psarras, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2014	—	`conf`	Exploration of system availability during software-based self-testing in many-core systems under test latency constraints. DFT Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
2013	—	`conf`	DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems. DFTS Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
2013	—	`conf`	Do we need wide flits in Networks-on-Chip? ISVLSI Junghee Lee, Chrysostomos Nicopoulos, Sung Joo Park, Madhavan Swaminathan, Jongman Kim
2013	J	`jnl`	Dynamic fault-tolerant routing algorithm for networks-on-chip based on localised detouring paths. IET Comput. Digit. Tech. Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
2013	A*	`conf`	ECM: Effective Capacity Maximizer for high-performance compressed caching. HPCA Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, Jongman Kim
2013	—	`conf`	Hardware-Assisted Intrusion Detection by Preserving Reference Information Integrity. ICA3PP (1) Junghee Lee, Chrysostomos Nicopoulos, Gi-Hwan Oh, Sang-Won Lee, Jongman Kim
2013	J	`jnl`	IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures. IEEE Trans. Very Large Scale Integr. Syst. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Shreepad Panth, Sung Kyu Lim, Jongman Kim
2013	J	`jnl`	Sharded Router: A novel on-chip router architecture employing bandwidth sharding and stealing. Parallel Comput. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
2013	A	`conf`	Switch folding: network-on-chip routers with time-multiplexed output ports. DATE Giorgos Dimitrakopoulos, N. Georgiadis, Chrysostomos Nicopoulos, Emmanouil Kalligeros
2013	J	`jnl`	TornadoNoC: A lightweight and scalable on-chip network architecture for the many-core era. ACM Trans. Archit. Code Optim. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
2012	—	`conf`	A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems. ISVLSI Hyung Gyu Lee, Seungcheol Baek, Jongman Kim, Chrysostomos Nicopoulos
2012	J	`jnl`	A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
2012	—	`conf`	A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures. ACM Great Lakes Symposium on VLSI Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Jongman Kim
2012	—	`conf`	A highly robust distributed fault-tolerant routing algorithm for NoCs with localized rerouting. INA-OCMC@HiPEAC Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
2012	—	`conf`	A programmable processing array architecture supporting dynamic task scheduling and module-level prefetching. Conf. Computing Frontiers Junghee Lee, Hyung Gyu Lee, Soonhoi Ha, Jongman Kim, Chrysostomos Nicopoulos
2012	A*	`conf`	NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures. MICRO Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides
2012	J	`jnl`	Optimizing Data-Center TCO with Scale-Out Processors. IEEE Micro Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides
2012	C	`conf`	Thermal characterization of cloud workloads on a power-efficient server-on-chip. ICCD Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Ozer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides
2012	—	`conf`	Virtualizing Virtual Channels for Increased Network-on-Chip Robustness and Upgradeability. ISVLSI Marios Evripidou, Chrysostomos Nicopoulos, Vassos Soteriou, Jongman Kim
2011	C	`conf`	A High-Performance and Energy-Efficient Virtually Tagged Stack Cache Architecture for Multi-core Environments. HPCC Suk Chan Kang, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
2011	C	`conf`	An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems. ICCD Hyung Gyu Lee, Seungcheol Baek, Chrysostomos Nicopoulos, Jongman Kim
2011	A	`conf`	Hardware-Based Job Queue Management for Manycore Architectures and OpenMP Environments. IPDPS Junghee Lee, Chrysostomos Nicopoulos, Yongjae Lee, Hyung Gyu Lee, Jongman Kim
2011	A	`conf`	Large-Scale Semantic Concept Detection on Manycore Platforms for Multimedia Mining. IPDPS Mamadou Diao, Chrysostomos Nicopoulos, Jongman Kim
2011	J	`jnl`	Variation-Aware Task and Communication Mapping for MPSoC Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Feng Wang, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
2010	C	`conf`	A fine-grained link-level fault-tolerant mechanism for networks-on-chip. ICCD Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
2010	—	`book`	Network-on-Chip Architectures - A Holistic Design Exploration Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
2010	J	`jnl`	On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin
2009	J	`jnl`	Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay Kumar Verma, Seyed-Hosein Attarzadeh-Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne
2008	A	`conf`	Analysis and solutions to issue queue process variation. DSN Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2008	Misc	`conf`	Design space exploration for field programmable compressor trees. CASES Seyed-Hosein Attarzadeh-Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne
2008	A*	`conf`	Performance and power optimization through data compression in Network-on-Chip architectures. HPCA Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Mazin S. Yousif, Chita R. Das
2007	A*	`conf`	A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
2007	—	`conf`	Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. Hot Interconnects Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das
2007	A	`conf`	Variation-aware task allocation and scheduling for MPSoC. ICCAD Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
2006	—	`conf`	A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects. Nano-Net Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das
2006	A*	`conf`	A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. ISCA Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Mazin S. Yousif, Chita R. Das
2006	Misc	`conf`	A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal
2006	A*	`conf`	Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir
2006	A	`conf`	Exploring Fault-Tolerant Network-on-Chip Architectures. DSN Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das
2006	A*	`conf`	ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. MICRO Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
2005	—	`conf`	Design and analysis of an NoC architecture from performance, reliability and energy perspective. ANCS Jongman Kim, Dongkook Park, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Chita R. Das