Christophe Jégo

135 papers B 6C 16Misc 4Journal 47Unranked 62

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A Simulation Methodology for Fast Verification of Cyber-Physical Systems. RAPIDO@HiPEAC Maxime Gras-Chevalier, Christophe Jégo, Camille Leroux, Franck Guillemard
2026	J	`jnl`	Design and FPGA Prototyping of a Flexible Receiver based on Expectation Propagation. J. Signal Process. Syst. Ian Fischer Schilling, Serdar Sahin, Camille Leroux, Antonio Maria Cipriano, Christophe Jégo
2025	—	`conf`	Computing the Low-Weight codewords of Punctured and Shortened Pre-Transformed Polar Codes. ISTC Malek Ellouze, Romain Tajan, Camille Leroux, Christophe Jégo, Charly Poulliat
2025	C	`conf`	From Concept to FPGA Prototype: System Design and Verification for the Control of 3-Phase Permanent Magnet Synchronous Motors. RSP Maxime Gras-Chevalier, Christophe Jégo, Camille Leroux, Franck Guillemard
2025	J	`jnl`	Odatix: An open-source design automation toolbox for FPGA/ASIC implementation. SoftwareX Jonathan Saussereau, Christophe Jégo, Camille Leroux, Jean-Baptiste Bégueret
2025	J	`jnl`	Optimal scheduling algorithms for software-defined radio pipelined and replicated task chains on multicore architectures. J. Parallel Distributed Comput. Diane Orhan, Laércio Lima Pilla, Denis Barthou, Adrien Cassagne, Olivier Aumage, Romain Tajan, Christophe Jégo, Camille Leroux
2025	—	`conf`	Quasi-Cyclic Gradient Learning: A Method to Improve Performance of 5G QC-LDPC Codes. 6GNet Emmanuelle Bodji, Emmanuel Boutillon, Bruno Jahan, Christophe Jégo
2025	—	`conf`	Scheduling Strategies for Partially-Replicable Task Chains on Two Types of Resources. IPDPS (Workshops) Diane Orhan, Yacine Idouar, Laércio Lima Pilla, Adrien Cassagne, Denis Barthou, Christophe Jégo
2025	J	`jnl`	Scheduling Strategies for Partially-Replicable Task Chains on Two Types of Resources. CoRR Diane Orhan, Yacine Idouar, Laércio Lima Pilla, Adrien Cassagne, Denis Barthou, Christophe Jégo
2024	J	`jnl`	Computing the Low-Weight codewords of Punctured and Shortened Pre-Transformed polar Codes. CoRR Malek Ellouze, Romain Tajan, Camille Leroux, Christophe Jégo, Charly Poulliat
2024	—	`conf`	Hardware Implementation of Soft Mapper/Demappers in Iterative EP-Based Receivers. SiPS Ian Fischer Schilling, Serdar Sahin, Camille Leroux, Antonio Maria Cipriano, Christophe Jégo
2024	J	`jnl`	Hardware Implementation of Soft Mapper/Demappers in Iterative EP-based Receivers. CoRR Ian Fischer Schilling, Serdar Sahin, Camille Leroux, Antonio Maria Cipriano, Christophe Jégo
2023	J	`jnl`	A DSEL for high throughput and low latency software-defined radio on multicore CPUs. Concurr. Comput. Pract. Exp. Adrien Cassagne, Romain Tajan, Olivier Aumage, Camille Leroux, Denis Barthou, Christophe Jégo
2023	C	`conf`	AsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration. ISCAS Jonathan Saussereau, Camille Leroux, Jean-Baptiste Bégueret, Christophe Jégo
2023	—	`conf`	Design and Implementation of a RISC-V core with a Flexible Pipeline for Design Space Exploration. ICECS Jonathan Saussereau, Christophe Jégo, Camille Leroux, Jean-Baptiste Bégueret
2023	J	`jnl`	High-performance hard-input LDPC decoding on multi-core devices for optical space links. J. Syst. Archit. Bertrand Le Gal, Christophe Jégo, Vincent Pignoly
2023	C	`conf`	Implementation of an Assignment Algorithm for Object Tracking on a FPGA MPSoC. DSD Denis Shemonaev, Bertrand Le Gal, Christophe Jégo, Anthony Besseau
2023	—	`conf`	Low-Complexity Algorithm for the Minimum Distance Properties of PAC Codes. ISTC Malek Ellouze, Romain Tajan, Camille Leroux, Christophe Jégo, Charly Poulliat
2023	C	`conf`	Model Based Design of FMCW Radar Processing Systems on FPGA Platforms. DSD Hugues Almorin, Bertrand Le Gal, Christophe Jégo, Vincent Kissel
2022	J	`jnl`	A DSEL for High Throughput and Low Latency Software-Defined Radio on Multicore CPUs. CoRR Adrien Cassagne, Romain Tajan, Olivier Aumage, Camille Leroux, Denis Barthou, Christophe Jégo
2022	J	`jnl`	A novel JFG detection-decoding approach of a vertical shuffle scheduling for iterative MIMO receivers with NB-LDPC codes. Signal Process. Ali Haroun, Ali Chamas Al Ghouwayel, Hussein Hijazi, Christophe Jégo
2022	—	`conf`	An IoT SoC for Agricultural Applications. LASCAS Victor Grimblatt, Guillaume Ferré, Francois Rivet, Christophe Jégo
2022	—	`conf`	High-Performance Gallager-E Decoders for Hard Input LDPC Decoding on Multi-core Devices. DASIP Bertrand Le Gal, Vincent Pignoly, Christophe Jégo
2022	—	`conf`	High-throughput FFT architectures using HLS tools. ICECS 2022 Hugues Almorin, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, Vincent Kissel
2022	—	`conf`	Methodology to Adapt Neural Network on Constrained Device at Topology level. SiPS Logan Saint-Germain, Bertrand Le Gal, Fabien Baldacci, Jérémie Crenne, Christophe Jégo, Sebastien Loty
2021	—	`conf`	A Flexible and Portable Real-time DVB-S2 Transceiver using Multicore and SIMD CPUs. ISTC Adrien Cassagne, Mathieu Léonardon, Romain Tajan, Camille Leroux, Christophe Jégo, Olivier Aumage, Denis Barthou
2021	—	`conf`	An Energy Efficient and Scalable Node Architecture for Sensor Network. NEWCAS Yassine Faize, Jérémie Crenne, Nicolas Hanusse, Christophe Jégo
2021	J	`jnl`	How to Feed a Growing Population - An IoT Approach to Crop Health and Growth. IEEE J. Emerg. Sel. Topics Circuits Syst. Victor Grimblatt, Christophe Jégo, Guillaume Ferré, Francois Rivet
2021	—	`conf`	Tailored List Decoding of Polar Codes. ISTC Malek Ellouze, Camille Leroux, Romain Tajan, Charly Poulliat, Christophe Jégo
2020	—	`conf`	Fair comparison of hardware and software LDPC decoder implementations for SDR space links. ICECS Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
2020	—	`conf`	High speed LDPC decoding for optical space link. ICECS Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
2020	J	`jnl`	High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors. J. Signal Process. Syst. Bertrand Le Gal, Christophe Jégo
2020	—	`conf`	Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding. SiPS Bertrand Le Gal, Yann Delomier, Camille Leroux, Christophe Jégo
2020	J	`jnl`	Low-latency and high-throughput software turbo decoders on multi-core architectures. Ann. des Télécommunications Bertrand Le Gal, Christophe Jégo
2020	J	`jnl`	Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices. J. Signal Process. Syst. Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2020	J	`jnl`	Model-based Design of Hardware SC Polar Decoders for FPGAs. ACM Trans. Reconfigurable Technol. Syst. Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2019	J	`jnl`	AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX Adrien Cassagne, Olivier Hartmann, Mathieu Léonardon, Kun He, Camille Leroux, Romain Tajan, Olivier Aumage, Denis Barthou, Thibaud Tonnellier, Vincent Pignoly, Bertrand Le Gal, Christophe Jégo
2019	J	`jnl`	Fast and Flexible Software Polar List Decoders. J. Signal Process. Syst. Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria
2019	—	`conf`	Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis. SiPS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2019	C	`conf`	Precision Agriculture for Small to Medium Size Farmers - An IoT Approach. ISCAS Victor Grimblatt, Guillaume Ferré, Francois Rivet, Christophe Jégo, Nicolas Vergara
2018	B	`conf`	ADMM hardware decoder for regular LDPC codes using a NISC-based architecture. WCNC Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	C	`conf`	Custom Low Power Processor for Polar Decoding. ISCAS Mathieu Léonardon, Camille Leroux, David Binet, J. M. Pierre Langlois, Christophe Jégo, Yvon Savaria
2018	—	`conf`	Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis. ICECS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	—	`conf`	From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. ICECS Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	—	`conf`	Hardware design of Euclidean Projection modules for ADMM LDPC decoding. ICECS Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	High data rate and flexible hardware QC-LDPC decoder for satellite optical communications. ISTC Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat
2018	J	`jnl`	High-performance software implementations of SCAN decoder for polar codes. Ann. des Télécommunications Bertrand Le Gal, Camille Leroux, Christophe Jégo
2018	B	`conf`	Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes. WCNC Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	MIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard. WPMVP@PPoPP Adrien Cassagne, Olivier Aumage, Denis Barthou, Camille Leroux, Christophe Jégo
2018	—	`conf`	Model-based Design of Efficient LDPC Decoder Architectures. ISTC Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
2018	J	`jnl`	Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding. J. Signal Process. Syst. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2018	—	`conf`	Transport Triggered Polar Decoders. ISTC Mathieu Léonardon, Camille Leroux, Pekka Jääskeläinen, Christophe Jégo, Yvon Savaria
2017	C	`conf`	A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures. ISCC Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	An LP-based algorithm for decoding terminated LDPC convolutional codes. IINTEC Hayfa Ben Thameur, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2017	J	`jnl`	Fast and Flexible Software Polar List Decoders. CoRR Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria
2017	—	`conf`	Improving performance of SCMA MPA decoders using estimation of conditional probabilities. NEWCAS Alireza Ghaffari, Mathieu Léonardon, Yvon Savaria, Christophe Jégo, Camille Leroux
2017	Misc	`conf`	Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes. SoftCOM Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	Low-latency software LDPC decoders for x86 multi-core devices. SiPS Bertrand Le Gal, Christophe Jégo
2017	J	`jnl`	Memory Requirement Reduction Method for Successive Cancellation Decoding of Polar Codes. J. Signal Process. Syst. Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2017	—	`conf`	Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes. SiPS Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2017	—	`conf`	Successive cancellation decoder for very long polar codes. SiPS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	C	`conf`	A scalable 3-phase polar decoder. ISCAS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	—	`conf`	Comparison of different schedulings for the ADMM based LDPC decoding. ISTC Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2016	B	`conf`	Evaluation of the hardware complexity of the ADMM approach for LDPC decoding. WCNC Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Fast Converging ADMM-Penalized Algorithm for LDPC Decoding. IEEE Commun. Lett. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2016	—	`conf`	Hardware architecture for lowering the error floor of LTE turbo codes. DASIP Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
2016	J	`jnl`	High-Throughput Multi-Core LDPC Decoders Based on x86 Processor. IEEE Trans. Parallel Distributed Syst. Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Low-Complexity Soft Detection of QAM Demapper for a MIMO System. IEEE Commun. Lett. Ali Haroun, Charbel Abdel Nour, Matthieu Arzel, Christophe Jégo
2016	J	`jnl`	Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Benjamin Gadat, Christophe Jégo, Nicolas Van Wambeke
2016	—	`conf`	Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
2016	Misc	`conf`	Memory reduction techniques for successive cancellation decoding of polar codes. ICASSP Bertrand Le Gal, Camille Leroux, Christophe Jégo
2016	Misc	`conf`	Multicore implementation of LDPC decoders based on ADMM algorithm. ICASSP Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
2016	J	`jnl`	Real Time LP Decoding of LDPC Codes for High Correction Performance Applications. IEEE Wirel. Commun. Lett. Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2015	—	`conf`	Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation. ICECS Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
2015	—	`conf`	Hardware implementation of a soft cancellation decoder for polar codes. DASIP Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2015	J	`jnl`	High-Throughput LDPC Decoder on Low-Power Embedded Processors. IEEE Commun. Lett. Bertrand Le Gal, Christophe Jégo
2015	J	`jnl`	Multi-Gb/s Software Decoding of Polar Codes. IEEE Trans. Signal Process. Bertrand Le Gal, Camille Leroux, Christophe Jégo
2015	C	`conf`	Partial sums computation in polar codes decoding. ISCAS Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2014	J	`jnl`	A Flexible NISC-Based LDPC Decoder. IEEE Trans. Signal Process. Bertrand Le Gal, Christophe Jégo, Camille Leroux
2014	J	`jnl`	A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices. IEEE Embed. Syst. Lett. Bertrand Le Gal, Christophe Jégo, Jérémie Crenne
2014	J	`jnl`	GPU-like on-chip system for decoding LDPC codes. ACM Trans. Embed. Comput. Syst. Bertrand Le Gal, Christophe Jégo
2014	—	`conf`	Low-complexity LDPC-coded iterative MIMO receiver based on belief propagation algorithm for detection. ISTC Ali Haroun, Charbel Abdel Nour, Matthieu Arzel, Christophe Jégo
2014	—	`conf`	Low-complexity layered BP-based detection and decoding for a NB-LDPC coded MIMO system. ICC Ali Haroun, Charbel Abdel Nour, Matthieu Arzel, Christophe Jégo
2014	—	`conf`	Software polar decoder on an embedded processor. SiPS Bertrand Le Gal, Camille Leroux, Christophe Jégo
2014	B	`conf`	Symbol-based BP detection for MIMO systems associated with non-binary LDPC codes. WCNC Ali Haroun, Charbel Abdel Nour, Matthieu Arzel, Christophe Jégo
2013	J	`jnl`	Analysis of the Convergence Process by EXIT Charts for Parallel Implementations of Turbo Decoders. IEEE Commun. Lett. Oscar Sanchez, Christophe Jégo, Michel Jézéquel
2013	C	`conf`	Muller C-element based Decoder (MCD): A decoder against transient faults. ISCAS Yangyang Tang, Emmanuel Boutillon, Chris Winstead, Christophe Jégo, Michel Jézéquel
2013	J	`jnl`	Méthodologie d'optimisation des processeurs embarqués. Une approche favorisant la réduction de la surface et de la consommation des processeurs embarqués. Tech. Sci. Informatiques Bertrand Le Gal, Christophe Jégo
2013	J	`jnl`	Partial Sums Computation In Polar Codes Decoding. CoRR Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2013	J	`jnl`	Partial Sums Generation Architecture for Successive Cancellation Decoding of Polar Codes. CoRR Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2013	—	`conf`	Partial sums generation architecture for successive cancellation decoding of polar codes. SiPS Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet
2013	J	`jnl`	Softcore Processor Optimization According to Real-Application Requirements. IEEE Embed. Syst. Lett. Bertrand Le Gal, Christophe Jégo
2013	—	`conf`	Welcome to the 2013 conference on design and architectures for signal and image processing (DASIP) in Cagliari, Italy. DASIP Paolo Meloni, Christophe Jégo
2012	—	`conf`	A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders. SiPS Oscar Sanchez, Michel Jézéquel, Saeed-ur Rehman, Awais Sani, Cyrille Chavet, Philippe Coussy, Christophe Jégo
2012	J	`jnl`	A contribution to the reduction of the dynamic power dissipation in the turbo decoder. Ann. des Télécommunications Haisheng Liu, Christophe Jégo, Emmanuel Boutillon, Michel Jézéquel, Jean-Philippe Diguet
2012	—	`conf`	A space-time redundancy technique for embedded stochastic error correction. ISTC Chris Winstead, Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2012	C	`conf`	An LDPC decoding method for fault-tolerant digital logic. ISCAS Yangyang Tang, Chris Winstead, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2012	—	`conf`	Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards. SiPS Bertrand Le Gal, Christophe Jégo
2012	J	`jnl`	Design of an Efficient Maximum Likelihood Soft Decoder for Systematic Short Block Codes. IEEE Trans. Signal Process. Patrick Adde, Daniel Gomez Toro, Christophe Jégo
2012	—	`conf`	FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard. DASIP Bertrand Le Gal, Christophe Jégo
2011	—	`conf`	A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping. SiPS Meng Li, Charbel Abdel Nour, Christophe Jégo, Jianxiao Yang, Catherine Douillard
2011	C	`conf`	Assertion support in high-level synthesis design flow. FDL Aurélien Ribon, Bertrand Le Gal, Christophe Jégo, Dominique Dallet
2011	Misc	`conf`	Efficient iterative receiver for bit-Interleaved Coded Modulation according to the DVB-T2 standard. ICASSP Meng Li, Charbel Abdel Nour, Christophe Jégo, Jianxiao Yang, Catherine Douillard
2011	—	`conf`	Hardware efficiency versus error probability in unreliable computation. SiPS Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2011	J	`jnl`	Stochastic Multiple Stream Decoding of Cortex Codes. IEEE Trans. Signal Process. Matthieu Arzel, Cyril Lahuec, Christophe Jégo, Warren J. Gross, Yvain Bruned
2011	J	`jnl`	Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. J. Signal Process. Syst. Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel
2010	—	`conf`	A new single-error correction scheme based on self-diagnosis residue number arithmetic. DASIP Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2010	—	`conf`	Design and implementation of a soft-decision decoder for Cortex codes. ICECS Patrick Adde, Christophe Jégo, Raphaël Le Bidan, Jorge Ernesto Pérez Chamorro
2010	J	`jnl`	Stochastic Decoding of Turbo Codes. IEEE Trans. Signal Process. Quang Trung Dong, Matthieu Arzel, Christophe Jégo, Warren J. Gross
2009	—	`conf`	Blind Frame Synchronization of Product Codes Based on the Adaptation of the Parity Check Matrix. ICC Rodrigue Imad, Sébastien Houcke, Christophe Jégo
2009	C	`conf`	Design of an Iterative Receiver for Linearly Precoded MIMO Systems. ISCAS Daoud Karakolah, Christophe Jégo, Charlotte Langlais, Michel Jézéquel
2009	—	`conf`	Design of rotated QAM mapper/demapper for the DVB-T2 standard. SiPS Meng Li, Charbel Abdel Nour, Christophe Jégo, Catherine Douillard
2009	—	`conf`	FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. ERSA Christophe Jégo
2009	J	`jnl`	High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. J. Signal Process. Syst. Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2009	J	`jnl`	Turbo decoding of product codes using adaptive belief propagation. IEEE Trans. Commun. Christophe Jégo, Warren J. Gross
2008	—	`conf`	A highly parallel Turbo Product Code decoder without interleaving resource. SiPS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta
2008	—	`conf`	On the higher efficiency of parallel Reed-Solomon turbo-decoding. ICECS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2008	J	`jnl`	Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design. EURASIP J. Wirel. Commun. Netw. Raphaël Le Bidan, Camille Leroux, Christophe Jégo, Patrick Adde, Ramesh Pyndiah
2008	J	`jnl`	Stochastic Decoding of Linear Block Codes With High-Density Parity-Check Matrices. IEEE Trans. Signal Process. Saeed Sharifi Tehrani, Christophe Jégo, Bo Zhu, Warren J. Gross
2007	J	`jnl`	Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s. Ann. des Télécommunications Christophe Jégo, Patrick Adde, Camille Leroux
2007	—	`conf`	Energy Efficient Turbo Decoder with Reduced State Metric Quantization. SiPS Haisheng Liu, Jean-Philippe Diguet, Christophe Jégo, Michel Jézéquel, Emmanuel Boutillon
2007	C	`conf`	Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2007	B	`conf`	Turbo Decoding of Product Codes based on the Modified Adaptive Belief Propagation Algorithm. ISIT Christophe Jégo, Warren J. Gross
2006	—	`conf`	A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. ISVLSI Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel
2006	—	`conf`	Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. ReCoSoC Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel
2006	C	`conf`	Efficient architecture for Reed Solomon block turbo code. ISCAS Erwan Piriou, Christophe Jégo, Patrick Adde, Raphaël Le Bidan, Michel Jézéquel
2006	B	`conf`	Reduced Complexity Iterative Multi-User Detector for IDMA (Interleave-Division Multiple Access) System. GLOBECOM Irene Masinjara Mahafeno, Charlotte Langlais, Christophe Jégo
2006	—	`conf`	The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. HICSS Catherine Dezan, Christophe Jégo, Bernard Pottier, Christophe Gouyen, Loïc Lagadec
2005	—	`conf`	Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit. ERSA Caaliph Andriamisaina, Catherine Dezan, Christophe Jégo, Bernard Pottier
2005	—	`conf`	C-based rapid prototyping for digital signal processing. EUSIPCO Emmanuel Casseau, Bertrand Le Gal, Pierre Bomel, Christophe Jégo, Sylvain Huet, Eric Martin
2005	C	`conf`	Hardware Virtual Components Compliant with Communication System Standards. DSD Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno
2004	—	`conf`	Reed-Solomon behavioral virtual component for communication systems. ISCAS (4) Emmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin
2004	J	`jnl`	Synthèse architecturale d'applications temps réel pour technologies submicroniques. Tech. Sci. Informatiques Emmanuel Casseau, Christophe Jégo, Eric Martin
2001	—	`conf`	Architectural synthesis of digital signal processing applications dedicated to submicron technologies. ICECS Emmanuel Casseau, Christophe Jégo, Eric Martin
1999	—	`conf`	Architectural Synthesis with Interconnection Cost Control. VLSI Christophe Jégo, Emmanuel Casseau, Eric Martin