Christodoulos Peltekis

25 papers A 2Journal 17Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
GCN-ABFT: Low-Cost Online Error Checking for Graph Convolutional Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Christodoulos Peltekis, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
IEEE Trans. Computers
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 — conf
Periodic Online Testing for Sparse Systolic Tensor Arrays.
MOCAST
Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Periodic Online Testing for Sparse Systolic Tensor Arrays.
CoRR
Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 J jnl
A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators.
IEEE Access
Dionysios Filippas, Christodoulos Peltekis, Vasileios Titopoulos, Ioannis Kansizoglou, Georgios Ch. Sirakoulis, Antonios Gasteratos, Giorgos Dimitrakopoulos
2024 J jnl
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.
IEEE Comput. Archit. Lett.
Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 J jnl
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.
CoRR
Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 — conf
Error Checking for Sparse Systolic Tensor Arrays.
AICAS
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos
2024 J jnl
Error Checking for Sparse Systolic Tensor Arrays.
CoRR
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos
2024 J jnl
Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines.
CoRR
Kosmas Alexandridis, Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos
2024 J jnl
GCN-ABFT: Low-Cost Online Error Checking for Graph Convolutional Networks.
CoRR
Christodoulos Peltekis, Giorgos Dimitrakopoulos
2024 A conf
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
DATE
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 — conf
Reusing Softmax Hardware Unit for GELU Computation in Transformers.
AICAS
Christodoulos Peltekis, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2024 J jnl
Reusing Softmax Hardware Unit for GELU Computation in Transformers.
CoRR
Christodoulos Peltekis, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2023 A conf
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining.
DATE
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
2023 J jnl
Exploiting data encoding and reordering for low-power streaming in systolic arrays.
Microprocess. Microsystems
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023 J jnl
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2023 — conf
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.
MOCAST
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023 J jnl
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.
CoRR
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023 — conf
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines.
AICAS
Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023 J jnl
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines.
CoRR
Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
2023 J jnl
The Case for Asymmetric Systolic Array Floorplanning.
CoRR
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos A. Nicopoulos
2022 J jnl
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining.
CoRR
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
2022 — conf
FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks.
ASAP
Christodoulos Peltekis, Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos