Christian Weis

98 papers A* 2A 15B 3C 12Misc 5Journal 25Unranked 36

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	A 15 Gb/s Single-Ended Active-Inductive Equalizer with an Optimized Gain-Enhancing Technique. NewCAS Mohammadreza Esmaeilpour, Marco Mestice, Jan Lappas, Christian Weis, Norbert Wehn
2025	—	`conf`	A 4.266 Gbps/pin LPDDR4X PHY with an Integrated RISC-V Subsystem Optimized for Large Bump Pitch in 12nm FinFET Technology. SOCC Marco Mestice, Johannes Feldmann, Jan Lappas, Mohammadreza Esmaeilpour, Christian Weis, Norbert Wehn
2025	B	`conf`	Analysis and Mitigation of Radiation Effects in SRAM-based Register Files. ETS Zhe Zhang, Surendra Hemaram, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2025	C	`conf`	Design of a Low-Power 4.3 Gb/s Transceiver Using Pre-computed Lookup Tables. DDECS Hussien Abdo, Jan Lappas, Mohammadreza Esmaeilpour, Christian Weis, Norbert Wehn
2025	J	`jnl`	Enhanced LPDDR4X PHY in 12 nm FinFET. CoRR Johannes Feldmann, Jan Lappas, Mohammadreza Esmaeilpour, Hussien Abdo, Christian Weis, Norbert Wehn
2025	J	`jnl`	HLS4PC: A Parametrizable Framework For Accelerating Point-Based 3D Point Cloud Models on FPGA. CoRR Amur Saqib Pal, Muhammad Mohsin Ghaffar, Faisal Shafait, Christian Weis, Norbert Wehn
2024	C	`conf`	3D Decision Support Tool for Brain Tumour Surgery: The STRATUM Project. DSD Himar Fabelo, Raquel León, Emanuele Torti, Santiago Marco, Max Verbers, Yann Falevoz, Yolanda Ramallo-Fariña, Christian Weis, Ana M. Wägner, Eduardo Juárez Martínez, Claudio Rial, Alfonso Lagares, Gustav Burström, Francesco Leporati, Elisa Marenzi, Teresa Cervero, Miquel Moretó, Giovanni Danese, Sveta Zinger, Francesca Manni, Maria Luisa Alvarez-Male, Jesús Morera, Bernardino Clavo, Gustavo M. Callicó, Stratum Consortium
2024	—	`conf`	A 10 Gb/s Low-Power Single-Ended Linear Equalizer for DRAM Interfaces. NorCAS Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	—	`conf`	A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces. NewCAS Mohammadreza Esmaeilpour, Jan Lappas, Hussien Abdo, Christian Weis, Norbert Wehn
2024	C	`conf`	A Low-Power Linear Phase Interpolation-Based Delay Line in 12nm FinFET Technology. VLSI-SoC Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	—	`conf`	A Wide-Range Low-Power Phase Interpolation-Based Delay Line with a Linearity Improvement Technique. VLSI-SoC (Selected Papers) Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	Misc	`conf`	Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. VTS Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2024	C	`conf`	Do Radiation and Aging Impact DVFS? TCAD-based Analysis on 22 nm FDSOI Latches. IOLTS Zhe Zhang, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif
2024	A	`conf`	Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects. ITC Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2024	B	`conf`	Timing Analysis beyond Complementary CMOS Logic Styles. ASPDAC Jan Lappas, Mohamed Amine Riahi, Christian Weis, Norbert Wehn, Sani R. Nassif
2023	C	`conf`	A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. IOLTS Zhe Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori
2023	J	`jnl`	The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop. Sensors Hirra Anwar, Saad Ullah Khan, Muhammad Mohsin Ghaffar, Muhammad Fayyaz, Muhammad Jawad Khan, Christian Weis, Norbert Wehn, Faisal Shafait
2023	A	`conf`	ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE Gia Bao Thieu, Sven Gesper, Guillermo Payá-Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer
2022	—	`conf`	A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn
2022	J	`jnl`	A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn
2022	C	`conf`	FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn
2022	—	`conf`	Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn
2022	B	`conf`	Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori
2022	C	`conf`	Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn
2022	A	`conf`	Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE Jan Lappas, André Lucas Chinazzo, Christian Weis, ChenYang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn
2021	J	`jnl`	A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn
2021	—	`conf`	A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
2021	Misc	`conf`	Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning. DICTA Nosheen Abid, Muhammad Imran Malik, Muhammad Shahzad, Faisal Shafait, Haider Ali, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Marcus Liwicki
2021	J	`jnl`	Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2021	J	`jnl`	Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. IEEE Access Deepak M. Mathew, Hammam Kattan, Christian Weis, Jörg Henkel, Norbert Wehn, Hussam Amrouch
2021	—	`conf`	Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. MEMSYS L. J. Gokul Vasan, Éder F. Zulian, Christian Weis, Matthias Jung, Norbert Wehn
2021	Misc	`conf`	QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs. DICTA Muhammad Gohar Javed, Minahil Raza, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Muhammad Shahzad, Faisal Shafait
2021	—	`conf`	The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems Matthias Jung, Christian Weis, Norbert Wehn
2020	—	`conf`	A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn
2020	C	`conf`	Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. ISCAS Éder F. Zulian, Christian Weis, Norbert Wehn
2020	—	`conf`	An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. MEMSYS Deepak M. Mathew, Felipe S. Prado, Éder F. Zulian, Christian Weis, Muhammad Mohsin Ghaffar, Matthias Jung, Norbert Wehn
2020	—	`conf`	Efficient Generation of Application Specific Memory Controllers. MEMSYS Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn
2020	J	`jnl`	Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2020	—	`conf`	Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn
2020	J	`jnl`	Real-Time Energy Efficient Hand Pose Estimation: A Case Study. Sensors Mhd Rashed Al Koutayni, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker
2020	—	`conf`	System simulation with PULP virtual platform and SystemC. RAPIDO Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn
2020	J	`jnl`	The gem5 Simulator: Version 20.0+. CoRR Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
2020	J	`jnl`	eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2019	—	`conf`	A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn
2019	C	`conf`	An In-DRAM Neural Network Processing Engine. ISCAS Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
2019	Misc	`conf`	Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer
2019	—	`conf`	Fast validation of DRAM protocols with timed petri nets. MEMSYS Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
2019	—	`conf`	RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn
2019	J	`jnl`	eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2018	J	`jnl`	A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig
2018	—	`conf`	A Reconfigurable Accelerator for Morphological Operations. IPDPS Workshops Menbere Kina Tekleyohannes, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
2018	A	`conf`	An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung
2018	—	`conf`	Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
2018	—	`conf`	Efficient coding scheme for DDR4 memory subsystems. MEMSYS Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos
2018	A	`conf`	Improving the error behavior of DRAM by exploiting its Z-channel property. DATE Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
2018	J	`jnl`	Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
2018	C	`conf`	The Role of Memories in Transprecision Computing. ISCAS Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
2017	J	`jnl`	3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	—	`conf`	A Bank-Wise DRAM Power Model for System Simulations. RAPIDO Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn
2017	J	`jnl`	A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	J	`jnl`	A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
2017	A	`conf`	An advanced embedded architecture for connected component analysis in industrial applications. DATE Menbere Tekleyohannes, MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
2017	J	`jnl`	DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. Christian Weis, Abdul Mutaal, Omar Naji, Matthias Jung, Andreas Hansson, Norbert Wehn
2017	—	`conf`	Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
2017	—	`conf`	Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
2016	J	`jnl`	A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. Matthias Jung, Christian Weis, Norbert Wehn
2016	—	`conf`	A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn
2016	—	`conf`	ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco V. Natale, Sven O. Krumke
2016	—	`conf`	Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
2016	A	`conf`	Error resilience and energy efficiency: An LDPC decoder design study. DATE Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek
2016	A*	`conf`	Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
2016	—	`conf`	Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
2015	—	`conf`	A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian Weis, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn
2015	—	`conf`	A high-level DRAM timing, power and area exploration tool. SAMOS Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson
2015	J	`jnl`	Application-aware cross-layer reliability analysis and optimization. it Inf. Technol. Michael Glaß, Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Faramarz Khosravi, Veit B. Kleeberger, Alexandra Listl, Daniel Müller-Gritschneder, Fabian Oboril, Ulf Schlichtmann, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis
2015	J	`jnl`	DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. Matthias Jung, Christian Weis, Norbert Wehn
2015	—	`conf`	Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS Matthias Jung, Éder Zulian, Deepak M. Mathew, Matthias Herrmann, Christian Brugger, Christian Weis, Norbert Wehn
2015	A	`conf`	Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn
2015	—	`conf`	Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson
2014	A	`conf`	Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini
2014	A	`conf`	Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens
2014	A	`conf`	Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors. DATE Daniele Bortolotti, Andrea Bartolini, Christian Weis, Davide Rossi, Luca Benini
2014	C	`conf`	Optimized active and power-down mode refresh control in 3D-DRAMs. VLSI-SoC Matthias Jung, Christian Weis, Norbert Wehn, MohammadSadegh Sadri, Luca Benini
2014	J	`jnl`	Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
2013	J	`jnl`	A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn
2013	—	`conf`	Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ. FPGAworld MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Luca Benini
2013	J	`jnl`	Exploration and Optimization of 3-D Integrated DRAM Subsystems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
2013	A	`conf`	System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2013	—	`conf`	TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar
2013	A*	`conf`	Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2012	—	`conf`	A 2.15GBit/s turbo code decoder for LTE advanced base station applications. ISTC Thomas Ilnseher, Frank Kienle, Christian Weis, Norbert Wehn
2012	—	`conf`	A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. IPDPS Workshops Ivan Shcherbakov, Christian Weis, Norbert Wehn
2012	Misc	`conf`	ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems. ICNC Christina Gimmler, Frank Kienle, Christian Weis, Norbert Wehn, Matthias Alles
2012	A	`conf`	An energy efficient DRAM subsystem for 3D integrated SoCs. DATE Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
2012	A	`conf`	DRAM selection and configuration for real-time mobile systems. DATE Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2012	J	`jnl`	Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles
2011	C	`conf`	Bringing C++ productivity to VHDL world: From language definition to a case study. FDL Ivan Shcherbakov, Christian Weis, Norbert Wehn
2011	A	`conf`	Design space exploration for 3D-stacked DRAMs. DATE Christian Weis, Norbert Wehn, Igor Loi, Luca Benini