Christian Pacha

25 papers A* 1C 1Misc 1Journal 7Unranked 15

Year	Rank	Type	Title / Venue / Authors
2016	Misc	`conf`	Thermal issues in test: An overview of the significant aspects and industrial practice. VTS Juergen Alt, Paolo Bernardi, Alberto Bosio, Riccardo Cantoro, Hans G. Kerkhoff, Andreas Leininger, Wolfgang Molzer, Alessandro Motta, Christian Pacha, Alberto Pagani, Alireza Rohani, R. Strasser
2009	A*	`conf`	Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. DAC Thomas Baumann, Doris Schmitt-Landsiedel, Christian Pacha
2007	J	`jnl`	A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. IEEE J. Solid State Circuits Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Andre Bonnardot, Steffen Buch, Matthias Sauer
2007	—	`conf`	A merged MuGFET and planar SOI process. SoCC Andrew Marshall, C. Rinn Cleavelin, Weize Xiong, Christian Pacha, Gerhard Knoblinger, Klaus Von Armin, Thomas Schulz, Klaus Schruefer, Ken Matthews, Wolfgang Molzer, Paul Patruno, Christian Russ
2007	—	`conf`	Advances in Multi-Gate MOSFET Circuit Design. ICECS Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger
2007	—	`conf`	Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits. ESSCIRC Christian Pacha, Klaus von Arnim, Florian Bauer, Thomas Schulz, Wade Xiong, K. T. San, Andrew Marshall, Thomas Baumann, C. Rinn Cleavelin, Klaus Schruefer, Jörg Berthold
2007	—	`conf`	Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. ESSCIRC Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel
2007	—	`conf`	Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. ESSCIRC Thomas Baumann, Jörg Berthold, T. Niedermeier, Tim Schoenauer, J. Dienstuhl, Doris Schmitt-Landsiedel, Christian Pacha
2007	C	`conf`	Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha
2006	—	`conf`	A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. ISSCC Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Hamid Mabrouki, Goulhamid Juhoor, Matthias Sauer
2006	—	`conf`	Circuit design issues in multi-gate FET CMOS technologies. ISSCC Christian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, Michael Gostkowski, Gerhard Knoblinger, Andrew Marshall, Thomas Nirschl, Jörg Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer
2006	J	`jnl`	Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. IEEE J. Solid State Circuits Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel
2005	—	`conf`	Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. ESSCIRC Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel
2005	J	`jnl`	Efficiency of body biasing in 90-nm CMOS for low-power digital circuits. IEEE J. Solid State Circuits Klaus von Arnim, Eduardo Borinski, Peter Seegebrecht, Horst Fiedler, Ralf Brederlow, Roland Thewes, Jörg Berthold, Christian Pacha
2004	—	`conf`	Efficiency of body biasing in 90 nm CMOS for low power digital circuits. ESSCIRC Klaus von Arnim, Eduardo Borinski, Peter Seegebrecht, Horst Fiedler, Ralf Brederlow, Roland Thewes, Jörg Berthold, Christian Pacha
2003	J	`jnl`	Circuit and application aspects of tunnelling devices in a MOBILE configuration. Int. J. Circuit Theory Appl. Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude
2002	—	`conf`	Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE). SBCCI Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude
2002	—	`conf`	Experimental threshold logic implementations based on resonant tunnelling diodes. ICECS Werner Prost, Samuel O. Kim, Peter Glösekötter, Christian Pacha, Holger van Husen, Thorsten Reimann, Karl F. Goser, Franz-Josef Tegude
2001	—	`conf`	Tunnelling Diode Technology. ISMVL Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl Goser, Rainer Duschl, K. Eberl, O. Schmidt
2000	—	`conf`	Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor. SBCCI Peter Glösekötter, Christian Pacha, Karl F. Goser, Gilson I. Wirth, Werner Prost, Uwe Auer, M. Agethen, P. Velling, Franz-Josef Tegude
2000	J	`jnl`	Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes. Int. J. Circuit Theory Appl. Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl F. Goser, Guido Janssen, T. van der Roer
2000	J	`jnl`	Threshold logic circuit design of parallel adders using resonant tunneling devices. IEEE Trans. Very Large Scale Integr. Syst. Christian Pacha, Uwe Auer, Christian Burwick, Peter Glösekötter, Andreas Brennemann, Werner Prost, Franz-Josef Tegude, Karl F. Goser
1999	—	`conf`	Parameter Determination for Nano-Scale Modelling. Fuzzy Days Marc Thomas, Christian Pacha, Karl Goser
1999	—	`conf`	Resonant Tunneling Transistors for Threshold Logic Circuit Applications. Great Lakes Symposium on VLSI Christian Pacha, Peter Glösekötter, Karl Goser, Uwe Auer, Werner Prost, Franz-Josef Tegude
1997	J	`jnl`	Aspects of systems and circuits for nanoelectronics. Proc. IEEE Karl F. Goser, Christian Pacha, Andreas Kanstein, Markus L. Rossmann