Christer Svensson

85 papers A* 1A 3B 1C 4Misc 2Journal 34Unranked 40

Year	Rank	Type	Title / Venue / Authors
2020	—	`conf`	A 10b 1GS/s Inverter-Based Pipeline ADC in 65nm CMOS. NorCAS Timmy Sundström, Javad Bagheri Asli, Christer Svensson, Atila Alvandpour
2014	—	`conf`	A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain. ASP-DAC Nasim Farahini, Ahmed Hemani, Anders Lansner, Fabien Clermidy, Christer Svensson
2014	J	`jnl`	Power Consumption of Integrated Low-Power Receivers. IEEE J. Emerg. Sel. Topics Circuits Syst. Emil Nilsson, Christer Svensson
2013	—	`conf`	Resource efficient implementation of a 10Gb/s radio receiver baseband in FPGA. FPGAworld Christer Svensson, Zhongxia Simon He, Herbert Zirath, Lei Bao, Jingjing Chen
2013	J	`jnl`	Ultra Low Power Wake-Up Radio Using Envelope Detector and Transmission Line Voltage Transformer. IEEE J. Emerg. Sel. Topics Circuits Syst. Emil Nilsson, Christer Svensson
2012	J	`jnl`	Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Jonas Fritzin, Christer Svensson, Atila Alvandpour
2012	J	`jnl`	Design and Analysis of a Class-D Stage With Harmonic Suppression. IEEE Trans. Circuits Syst. I Regul. Pap. Jonas Fritzin, Christer Svensson, Atila Alvandpour
2011	—	`conf`	A +32 dBm 1.85 GHz class-D outphasing RF PA in 130nm CMOS for WCDMA/LTE. ESSCIRC Jonas Fritzin, Christer Svensson, Atila Alvandpour
2011	J	`jnl`	A 2.4 GS/s, Single-Channel, 31.3 dB SNDR at Nyquist, Pipeline ADC in 65 nm CMOS. IEEE J. Solid State Circuits Timmy Sundström, Christer Svensson, Atila Alvandpour
2011	—	`conf`	Envelope detector sensitivity and blocking characteristics. ECCTD Emil Nilsson, Christer Svensson
2011	—	`conf`	Power consumption bounds for SAR ADCs. ECCTD Dai Zhang, Christer Svensson, Atila Alvandpour
2010	—	`conf`	A 2.4 GS/s, 4.9 ENOB at Nyquist, single-channel pipeline ADC in 65nm CMOS. ESSCIRC Timmy Sundström, Christer Svensson, Atila Alvandpour
2010	—	`conf`	A Class-D outphasing RF amplifier with harmonic suppression in 90nm CMOS. ESSCIRC Jonas Fritzin, Christer Svensson, Atila Alvandpour
2009	J	`jnl`	Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. Timmy Sundström, Boris Murmann, Christer Svensson
2008	—	`conf`	2.6 Gb/s over a four-drop bus using an adaptive 12-tap DFE. ESSCIRC Henrik Fredriksson, Christer Svensson
2007	—	`conf`	3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus. SoC Henrik Fredriksson, Christer Svensson
2007	—	`conf`	A 1.4V 25mW Inductorless Wideband LNA in 0.13μm CMOS. ISSCC Rashad Ramzan, Stefan Back Andersson, Jerzy J. Dabrowski, Christer Svensson
2007	—	`conf`	Analog Power Modelling. PATMOS Christer Svensson
2007	—	`conf`	Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOS. ECCTD Stefan Back Andersson, Rashad Ramzan, Jerzy J. Dabrowski, Christer Svensson
2006	Misc	`conf`	A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency. VLSI Design Peter Caputa, Christer Svensson
2006	—	`conf`	An on-chip delay- and skew-insensitive multicycle communication scheme. ISSCC Peter Caputa, Christer Svensson
2006	C	`conf`	SC filter for RF down conversion with wideband image rejection. ISCAS Stefan Back Andersson, Jerzy J. Dabrowski, Christer Svensson, J. Konopacki
2005	J	`jnl`	A 2.4-GHz RF sampling receiver front-end in 0.18-μm CMOS. IEEE J. Solid State Circuits Darius Jakonis, Kalle Folkesson, Jerzy J. Dabrowski, Patrik Eriksson, Christer Svensson
2005	—	`conf`	A high-level dynamic-error model of a pipelined analog-to-digital converter. ISCAS (6) Kalle Folkesson, Christer Svensson, B. Knuthammar, A. Dreyfert
2005	—	`conf`	Synchronous latency-insensitive design for multiple clock domain. SoCC Anders Edman, Christer Svensson, Behzad Mesgarzadeh
2005	J	`jnl`	Well-behaved global on-chip interconnect. IEEE Trans. Circuits Syst. I Regul. Pap. Peter Caputa, Christer Svensson
2004	—	`conf`	2 GB/S decision feedback equalizer in 3.3 V 0.35 µM CMOS. Circuits, Signals, and Systems Håkan Bengtson, Christer Svensson
2004	—	`conf`	A low-swing single-ended L1 cache bus technique for sub-90nm technologies. ESSCIRC Peter Caputa, Mark A. Anders, Christer Svensson, Ram K. Krishnamurthy, Shekhar Borkar
2004	—	`conf`	A new mesochronous clocking scheme for synchronization in SoC. ISCAS (2) Behzad Mesgarzadeh, Christer Svensson, Atila Alvandpour
2004	—	`conf`	A scalable and robust rail-to-rail delay cell for DLLs. SoCC Håkan Bengtson, Christer Svensson
2004	—	`conf`	An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies. PATMOS Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Back Andersson, Atila Alvandpour, Christer Svensson
2004	—	`conf`	Mixed-signal DFE for multi-drop, gb/s, memory buses - a feasibility study. SoCC Henrik Fredriksson, Christer Svensson
2004	—	`conf`	Robust multi-phase clock generation with reduced jitter. SoCC Kalle Folkesson, Christer Svensson
2004	—	`conf`	Synchronous Latency Insensitive Design. ASYNC Christer Svensson
2004	A*	`conf`	Timing closure through a globally synchronous, timing partitioned design methodology. DAC Anders Edman, Christer Svensson
2003	—	`conf`	A 1.6 GHz downconversion sampling mixer in CMOS. ISCAS (1) Darius Jakonis, Christer Svensson
2003	—	`conf`	Bitline leakage equalization for sub-100nm caches. ESSCIRC Atila Alvandpour, Dinesh Somasekhar, Ram Krishnamurthy, Vivek De, Shekhar Borkar, Christer Svensson
2003	—	`conf`	Full-custom vs. standard-cell design flow: an adder case study. ASP-DAC Henrik Eriksson, Per Larsson-Edefors, Tomas Henriksson, Christer Svensson
2002	—	`conf`	A 1 GHz linearized CMOS track-and-hold circuit. ISCAS (5) Darius Jakonis, Christer Svensson
2002	—	`conf`	Application of Knowledge-based System in a B-to-B Environment. IMSA Martin Malis, Christer Svensson, Lars Hvam
2002	J	`jnl`	Electrical interconnects revitalized. IEEE Trans. Very Large Scale Integr. Syst. Christer Svensson
2002	—	`conf`	Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). ASP-DAC/VLSI Design Stefan Rusu, Manoj Sachdev, Christer Svensson, Bram Nauta
2001	—	`conf`	3V CMOS 0.35 µ transimpedance receiver for optical applications. ISCAS (4) Håkan Bengtson, Christer Svensson
2001	J	`jnl`	A low-power 416-lag 1.5-b 0.5-TMAC correlator in 0.6-μm CMOS. IEEE J. Solid State Circuits Anders Edman, Jacob Christensen, Anders Emrich, Christer Svensson
2001	—	`conf`	Modeling of dynamic errors in algorithmic A/D converters. ISCAS (5) Kalle Folkesson, Christer Svensson, Jan-Erik Eklund
2001	J	`jnl`	Optimum voltage swing on on-chip and off-chip interconnect. IEEE J. Solid State Circuits Christer Svensson
2000	J	`jnl`	Cosmic-ray soft error rate characterization of a standard 0.6-μm CMOS process. IEEE J. Solid State Circuits Peter Hazucha, Christer Svensson, Stephen A. Wender
2000	C	`conf`	GLMC: interconnect length estimation by growth-limited multifold clustering. ISCAS Atila Alvandpour, Per Larsson-Edefors, Christer Svensson
2000	A	`conf`	Low power mixed analog-digital signal processing. ISLPED Mattias Duppils, Christer Svensson
2000	J	`jnl`	Optimized test circuits for SER characterization of a manufacturing process. IEEE J. Solid State Circuits Peter Hazucha, Christer Svensson
2000	J	`jnl`	Pulsewidth control loop in high-speed CMOS clock buffers. IEEE J. Solid State Circuits Fenghao Mu, Christer Svensson
1999	J	`jnl`	A layout-based schematic method for very high-speed CMOS cell design. IEEE Trans. Very Large Scale Integr. Syst. Fenghao Mu, Christer Svensson
1999	—	`conf`	A leakage-tolerant multi-phase keeper for wide domino circuits. ICECS Atila Alvandpour, Per Larsson-Edefors, Christer Svensson
1999	—	`conf`	A novel mixed analog/digital MAC unit implemented with SC technique suitable for fully programmable narrow-band FIR filter applications. ICECS Mattias Duppils, Jan-Erik Eklund, Christer Svensson
1999	—	`conf`	High speed interface for system-on-chip design by self-tested self-synchronization. ISCAS (2) Fenghao Mu, Christer Svensson
1999	—	`conf`	High speed multistage CMOS clock buffers with pulse width control loop. ISCAS (2) Fenghao Mu, Christer Svensson
1999	—	`conf`	Methodology of layout based schematic and its usage in efficient high performance CMOS design. ISCAS (6) Fenghao Mu, Christer Svensson
1999	J	`jnl`	Vector Transfer by Self-Tested Self-Synchronization for Parallel Systems. IEEE Trans. Parallel Distributed Syst. Fenghao Mu, Christer Svensson
1998	—	`conf`	Efficient High-Speed CMOS Design by Layout Based Schematic Method. EUROMICRO Fenghao Mu, Christer Svensson
1998	A	`conf`	Low power and low voltage CMOS digital circuit techniques. ISLPED Christer Svensson, Atila Alvandpour
1998	B	`conf`	Self-Synchronized Vector Transfer for High Speed Parallel Systems. ICPADS Fenghao Mu, Christer Svensson
1998	A	`conf`	Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits. ISLPED Atila Alvandpour, Per Larsson-Edefors, Christer Svensson
1998	J	`jnl`	Time resolution of NMOS sampling switches used on low-swing signals. IEEE J. Solid State Circuits Henrik O. Johansson, Christer Svensson
1997	J	`jnl`	New single-clock CMOS latches and flipflops with improved speed and power savings. IEEE J. Solid State Circuits Jiren Yuan, Christer Svensson
1996	J	`jnl`	VLSI implementation of a focal plane image processor-a realization of the near-sensor image processing concept. IEEE Trans. Very Large Scale Integr. Syst. Jan-Erik Eklund, Christer Svensson, Anders Åström
1994	C	`conf`	5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2µm BiCMOS. ISCAS Jacob Midtgaard, Christer Svensson
1994	J	`jnl`	Impact of clock slope on true single phase clocked (TSPC) CMOS circuits. IEEE J. Solid State Circuits Patrik Larsson, Christer Svensson
1994	J	`jnl`	Noise in digital dynamic CMOS circuits. IEEE J. Solid State Circuits Patrik Larsson, Christer Svensson
1994	J	`jnl`	Power consumption estimation in CMOS VLSI chips. IEEE J. Solid State Circuits Dake Liu, Christer Svensson
1993	J	`jnl`	A 700-MHz 24-b pipelined accumulator in 1.2- mu m CMOS for application as a numerically controlled oscillator. IEEE J. Solid State Circuits Fang Lu, Henry Samueli, Jiren Yuan, Christer Svensson
1993	C	`conf`	A sensor array for phase and amplitude detection of synchronous modulated light sources. ISCAS Christer Jansson, Christer Svensson
1993	J	`jnl`	Single-chip image sensors with a digital processor array. J. VLSI Signal Process. Robert Forchheimer, Keping Chen, Christer Svensson, Anders Ödmark
1993	—	`conf`	System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT A. Dell'Acqua, M. Hansen, Sami J. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, Aurore Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, Simona Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson
1993	J	`jnl`	Trading speed for low power by choice of supply and threshold voltages. IEEE J. Solid State Circuits Dake Liu, Christer Svensson
1993	—	`conf`	Ultra high speed CMOS design. VLSI Christer Svensson, Jiren Yuan
1992	J	`jnl`	Performance of Synchronous and Asynchronous Schemes for VLSI Systems. IEEE Trans. Computers Morteza Afghahi, Christer Svensson
1990	J	`jnl`	A unified single-phase clocking scheme for VLSI systems. IEEE J. Solid State Circuits Morteza Afghahi, Christer Svensson
1990	Misc	`conf`	Single-Chip High-Speed Computation of Optical Flow. MVA Per-Erik Danielsson, Pär Emanuelsson, Keping Chen, Per Ingelhag, Christer Svensson
1989	J	`jnl`	High-speed CMOS circuit technique. IEEE J. Solid State Circuits Jiren Yuan, Christer Svensson
1988	J	`jnl`	Switch-level simulation and the pass transistor EXOR gate. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christer Svensson, Robert Tjärnström
1987	J	`jnl`	Fully Dynamic Switch-Level Simulation of CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rolf Sundblad, Christer Svensson
1987	J	`jnl`	Guest editorial. Integr. Christer Svensson
1986	J	`jnl`	Signal resynchronization in VLSI systems. Integr. Christer Svensson
1984	J	`jnl`	NORCHIP, a silicon brokers model. Integr. Ole Olesen, Christer Svensson
1983	J	`jnl`	VLSI physics. Integr. Christer Svensson