Chris Chu - RankMe

65 papers A* 6A 10C 1Misc 1Journal 25Unranked 16

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	Linear-time Mixed-Cell-Height Legalization for Minimizing Maximum Displacement. ISPD Chung-Hsien Wu, Wai-Kei Mak, Chris Chu
2021	Misc	`conf`	On the Convergence of Randomized Bregman Coordinate Descent for Non-Lipschitz Composite Problems. ICASSP Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
2020	J	`jnl`	Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ankur Sharma, David G. Chinnery, Tiago Reimann, Sarvesh Bhardwaj, Chris Chu
2020	J	`jnl`	Randomized Bregman Coordinate Descent Methods for Non-Lipschitz Optimization. CoRR Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
2019	J	`jnl`	CHIP: Clustering Hotspots in Layout Using Integer Programming. J. Electr. Comput. Eng. Rohit Reddy Takkala, Chris Chu
2019	—	`conf`	Lagrangian Relaxation Based Gate Sizing With Clock Skew Scheduling - A Fast and Effective Approach. ISPD Ankur Sharma, David G. Chinnery, Chris Chu
2019	J	`jnl`	Leveraging Two Reference Functions in Block Bregman Proximal Gradient Descent for Non-convex and Non-Lipschitz Problems. CoRR Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
2018	J	`jnl`	Area Optimization of Timing Resilient Designs Using Resynthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hsin-Ho Huang, Huimei Cheng, Chris Chu, Peter A. Beerel
2018	A*	`conf`	DID: Distributed Incremental Block Coordinate Descent for Nonnegative Matrix Factorization. AAAI Tianxiang Gao, Chris Chu
2018	J	`jnl`	DID: Distributed Incremental Block Coordinate Descent for Nonnegative Matrix Factorization. CoRR Tianxiang Gao, Chris Chu
2018	J	`jnl`	Introduction to the Special Section on Advances in Physical Design Automation. ACM Trans. Design Autom. Electr. Syst. Chris Chu, Mustafa Ozdal
2018	—	`conf`	Pioneer Research on Mathematical Models and Methods for Physical Design. ISPD Chris Chu
2018	—	`ed.`	Proceedings of the 2018 International Symposium on Physical Design, ISPD 2018, Monterey, CA, USA, March 25-28, 2018 ISPD Chris Chu, Ismail Bustany
2018	J	`jnl`	Self-Aligned Double Patterning-Aware Detailed Routing With Double Via Insertion and Via Manufacturability Consideration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yixiao Ding, Chris Chu, Wai-Kei Mak
2017	—	`conf`	A Fast Incremental Cycle Ratio Algorithm. ISPD Gang Wu, Chris Chu
2017	J	`jnl`	Minimum Implant Area-Aware Placement and Threshold Voltage Refinement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wai-Kei Mak, Wan-Sin Kuo, Shi-Han Zhang, Seong-I Lei, Chris Chu
2017	—	`conf`	Pin Accessibility-Driven Detailed Placement Refinement. ISPD Yixiao Ding, Chris Chu, Wai-Kei Mak
2017	—	`ed.`	Proceedings of the 2017 ACM on International Symposium on Physical Design, ISDP 2017, Portland, OR, USA, March 19-22, 2017 ISPD Mustafa Ozdal, Chris Chu
2017	A	`conf`	Rapid gate sizing with fewer iterations of Lagrangian Relaxation. ICCAD Ankur Sharma, David G. Chinnery, Shrirang Dhamdhere, Chris Chu
2017	J	`jnl`	Self-Aligned Double Patterning Lithography Aware Detailed Routing With Color Preassignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yixiao Ding, Chris Chu, Wai-Kei Mak
2017	J	`jnl`	Two Approaches for Timing-Driven Placement by Lagrangian Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gang Wu, Chris Chu
2016	—	`ch.`	Block Shaping in Floorplan. Encyclopedia of Algorithms Chris Chu
2016	J	`jnl`	Detailed Placement Algorithm for VLSI Design With Double-Row Height Standard Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gang Wu, Chris Chu
2016	—	`conf`	Minimum implant area-aware placement and threshold voltage refinement. ASP-DAC Seong-I Lei, Wai-Kei Mak, Chris Chu
2016	—	`ch.`	Wire Sizing. Encyclopedia of Algorithms Chris Chu
2014	J	`jnl`	An Effective Floorplan-Guided Placement Algorithm for Large-Scale Mixed-Size Designs. ACM Trans. Design Autom. Electr. Syst. Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
2014	A	`conf`	Asynchronous circuit placement by lagrangian relaxation. ICCAD Gang Wu, Tao Lin, Hsin-Ho Huang, Chris Chu, Peter A. Beerel
2014	—	`conf`	Double patterning-aware detailed routing with mask usage balancing. ISQED Seong-I Lei, Chris Chu, Wai-Kei Mak
2014	J	`jnl`	E-Beam Lithography Character and Stencil Co-Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wai-Kei Mak, Chris Chu
2014	—	`conf`	Flexible packed stencil design with multiple shaping apertures for e-beam lithography. ASP-DAC Chris Chu, Wai-Kei Mak
2014	A*	`conf`	POLAR 2.0: An Effective Routability-Driven Placer. DAC Tao Lin, Chris Chu
2014	A*	`conf`	Throughput Optimization for SADP and E-beam based Manufacturing of 1D Layout. DAC Yixiao Ding, Chris Chu, Wai-Kei Mak
2013	J	`jnl`	Capturing Cognitive Fingerprints from Keystroke Dynamics. IT Prof. J. Morris Chang, Chi-Chen Fang, Kuan-Hsing Ho, Norene Kelly, Pei Yuan Wu, Yixiao Ding, Chris Chu, Stephen B. Gilbert, Ahmed E. Kamal, Sun-Yuan Kung
2013	J	`jnl`	Fast and Effective Placement Refinement for Routability. IEEE Trans. Very Large Scale Integr. Syst. Yanheng Zhang, Chris Chu
2013	A	`conf`	POLAR: placement based on novel rough legalization and refinement. ICCAD Tao Lin, Chris Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev
2013	J	`jnl`	RegularRoute: An Efficient Detailed Router Applying Regular Routing Patterns. IEEE Trans. Very Large Scale Integr. Syst. Yanheng Zhang, Chris Chu
2013	J	`jnl`	SDS: An Optimal Slack-Driven Block Shaping Algorithm for Fixed-Outline Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jackey Z. Yan, Chris Chu
2012	J	`jnl`	FastRoute: An Efficient and High-Quality Global Router. VLSI Design Min Pan, Yue Xu, Yanheng Zhang, Chris Chu
2012	A*	`conf`	GDRouter: interleaved global routing and detailed routing for ultimate routability. DAC Yanheng Zhang, Chris Chu
2012	J	`jnl`	Line Search-Based Inverse Lithography Technique for Mask Design. VLSI Design Xin Zhao, Chris Chu
2012	—	`conf`	Optimal slack-driven block shaping algorithm in fixed-outline floorplanning. ISPD Jackey Z. Yan, Chris Chu
2012	J	`jnl`	Pad Assignment for Die-Stacking System-in-Package Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wai-Kei Mak, Yu-Chen Lin, Chris Chu, Ting-Chi Wang
2012	J	`jnl`	Rethinking the Wirelength Benefit of 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. Wai-Kei Mak, Chris Chu
2011	J	`jnl`	FOARS: FLUTE Based Obstacle-Avoiding Rectilinear Steiner Tree Construction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gaurav Ajwani, Chris Chu, Wai-Kei Mak
2011	A	`conf`	MGR: Multi-level global router. ICCAD Yue Xu, Chris Chu
2011	—	`conf`	RegularRoute: an efficient detailed router with regular routing patterns. ISPD Yanheng Zhang, Chris Chu
2010	—	`conf`	A matching based decomposer for double patterning lithography. ISPD Yue Xu, Chris Chu
2010	A	`conf`	An auction based pre-processing technique to determine detour in global routing. ICCAD Yue Xu, Chris Chu
2010	J	`jnl`	DeFer: Deferred Decision Making Enabled Fixed-Outline Floorplanning Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jackey Z. Yan, Chris Chu
2010	—	`conf`	FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction. ISPD Gaurav Ajwani, Chris Chu, Wai-Kei Mak
2010	—	`conf`	ITOP: integrating timing optimization within placement. ISPD Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li, Charles J. Alpert, Shyam Ramji, Chris Chu
2010	—	`conf`	SafeChoice: a novel clustering algorithm for wirelength-driven placement. ISPD Jackey Z. Yan, Chris Chu, Wai-Kei Mak
2009	A	`conf`	CROP: Fast and effective congestion refinement of placement. ICCAD Yanheng Zhang, Chris Chu
2009	—	`conf`	FastRoute 4.0: global router with efficient via minimization. ASP-DAC Yue Xu, Yanheng Zhang, Chris Chu
2009	A	`conf`	GREMA: Graph reduction based efficient mask assignment for double patterning technology. ICCAD Yue Xu, Chris Chu
2009	A*	`conf`	Handling complexities in modern large-scale mixed-size placement. DAC Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
2009	A	`conf`	Pad assignment for die-stacking System-in-Package design. ICCAD Yu-Chen Lin, Wai-Kei Mak, Chris Chu, Ting-Chi Wang
2008	A*	`conf`	DeFer: deferred decision making enabled fixed-outline floorplanner. DAC Jackey Z. Yan, Chris Chu
2008	A	`conf`	FastRoute3.0: a fast and high quality global router based on virtual capacity. ICCAD Yanheng Zhang, Yue Xu, Chris Chu
2008	—	`ch.`	Wire Sizing. Encyclopedia of Algorithms Chris Chu
2007	—	`ch.`	FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm. Modern Circuit Placement Natarajan Viswanathan, Min Pan, Chris Chu
2004	A	`conf`	FLUTE: fast lookup table based wirelength estimation technique. ICCAD Chris Chu
2003	C	`conf`	Optimizing SOC Test Resources using Dual Sequences. VLSI-SOC Wei Zou, Chris Chu, Sudhakar M. Reddy, Irith Pomeranz
1996	J	`jnl`	Dilation-5 Embedding of 3-Dimensional Grids into Hypercubes. J. Parallel Distributed Comput. Mee Yee Chan, Francis Y. L. Chin, Chris Chu, Wei-Kei Mak
1993	—	`conf`	Dilation-5 Embedding of 3-Dimensional Grids into Hypercubes. SPDP Mee Yee Chan, Francis Y. L. Chin, Chris Chu, Wai-Kei Mak