Chong S. Rim

11 papers C 2Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2010 J jnl
Adaptive Mixed Scheduling for Correcting Errors in Trapping Sets of LDPC Codes.
IEEE Commun. Lett.
Saejoon Kim, Seunghyuk Lee, Jun Heo, Chong S. Rim
1999 J jnl
A Graph Theoretical Approach for the Yield Enhancement of Reconfigurable VLSI/WSI Arrays.
Discret. Appl. Math.
Jagannathan Narasimhan, Kazuo Nakajima, Chong S. Rim
1999 — conf
Circuit partitioning by quadratic Boolean programming for reconfigurable circuit boards.
CICC
Yhonkyong Choi, Chong S. Rim
1999 J jnl
SEGRA: a very fast general area router for multichip modules.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
1997 — conf
A simple and effective greedy multilayer router for MCMs.
ISPD
Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
1995 C conf
A Block Matching Algorithm with 16: 1 Subsampling and Its Hardware Design.
ISCAS
Yanghoon Kim, Chong S. Rim, Byoungki Min
1994 C conf
Automatic Functional Cell Generation in the Sea-of-Gates Layout Style.
ISCAS
Yhonkyong Choi, Juhyun Lee, Chong S. Rim
1994 J jnl
Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jagannathan Narasimham, Kazuo Nakajima, Chong S. Rim, Anton T. Dahbura
1992 J jnl
General Circular Permutation Layout.
Math. Syst. Theory
Ruey-Der Lou, Majid Sarrafzadeh, Chong S. Rim, Kazuo Nakajima, Sumio Masuda
1989 J jnl
Exact algorithms for multilayer topological via minimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chong S. Rim, Toshinobu Kashiwabara, Kazuo Nakajima
1989 J jnl
Graph Bipartization and via Minimization.
SIAM J. Discret. Math.
Hyeong-Ah Choi, Kazuo Nakajima, Chong S. Rim