Chiraag Juvekar

27 papers A* 3B 1C 1Journal 15Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
Writing a Good Security Paper for ISSCC (2025).
CoRR
Utsav Banerjee, Chiraag Juvekar, Yong Ki Lee, Leibo Liu, Sanu Mathew, Thomas Pöppelmann, Shreyas Sen, Takeshi Sugawara, Ingrid Verbauwhede, Rabia Tugce Yazicigil
2023 A* conf
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption.
HPCA
Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2023 A* conf
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption.
MICRO
Rashmi Agrawal, Leo de Castro, Chiraag Juvekar, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2022 J jnl
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption.
CoRR
Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
2022 J jnl
Security Assessment of Phase-Based Ranging Systems in a Multipath Environment.
ACM J. Emerg. Technol. Comput. Syst.
Arslan Riaz, Dylan Nash, Jonathan Ngo, Chiraag Juvekar, Phillip M. Nadeau, Tao Yu, Rabia Tugce Yazicigil
2021 J jnl
Does Fully Homomorphic Encryption Need Compute Acceleration?
CoRR
Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
2021 J jnl
Does Fully Homomorphic Encryption Need Compute Acceleration?
IACR Cryptol. ePrint Arch.
Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
2021 — conf
Fast Vector Oblivious Linear Evaluation from Ring Learning with Errors.
WAHC@CCS
Leo de Castro, Chiraag Juvekar, Vinod Vaikuntanathan
2020 J jnl
Fast Vector Oblivious Linear Evaluation from Ring Learning with Errors.
IACR Cryptol. ePrint Arch.
Leo de Castro, Chiraag Juvekar, Vinod Vaikuntanathan
2019 J jnl
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications.
CoRR
Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
2019 J jnl
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications.
CoRR
Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
2019 J jnl
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications.
IEEE J. Solid State Circuits
Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
2019 J jnl
Reconstructing Network Inputs with Additive Perturbation Signatures.
CoRR
Nick Moran, Chiraag Juvekar
2018 — conf
A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures.
ASP-DAC
Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee
2018 J jnl
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation.
IEEE J. Solid State Circuits
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2018 — conf
An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications.
ISSCC
Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
2018 A* conf
GAZELLE: A Low Latency Framework for Secure Neural Network Inference.
USENIX Security Symposium
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2018 J jnl
GAZELLE: A Low Latency Framework for Secure Neural Network Inference.
IACR Cryptol. ePrint Arch.
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2018 J jnl
Gazelle: A Low Latency Framework for Secure Neural Network Inference.
CoRR
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
2017 — conf
21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation.
ISSCC
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2017 J jnl
A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures.
IEEE J. Solid State Circuits
Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan
2017 B conf
eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things.
GLOBECOM
Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan
2016 — conf
16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures.
ISSCC
Chiraag Juvekar, Hyung-Min Lee, Joyce Kwong, Anantha P. Chandrakasan
2014 J jnl
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications.
IEEE J. Solid State Circuits
Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2014 — ch.
Decoder Hardware Architecture for HEVC.
High Efficiency Video Coding
Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2013 — conf
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications.
ISSCC
Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
2013 C conf
HEVC interpolation filter architecture for quad full HD decoding.
VCIP
Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan