Ching-Long Su

12 papers A* 3B 3C 1Journal 2Unranked 3
YearRankTypeTitle / Venue / Authors
2011 J jnl
A two-stage algorithm integrating genetic algorithm and modified Newton method for neural network training in engineering systems.
Expert Syst. Appl.
Ching-Long Su, S. M. Yang, W. L. Huang
2000 C conf
Motion estimation using on-line arithmetic.
ISCAS
Ching-Long Su, Chein-Wei Jen
1996 B conf
Distributed arithmetic-based architectures for high speed IIR filter design.
ICPADS
Ching-Long Su, Yin-Tsung Hwang
1995 — conf
Cache design trade-offs for power and performance optimization: a case study.
ISLPD
Ching-Long Su, Alvin M. Despain
1995 — conf
Cache designs for energy efficiency.
HICSS (1)
Ching-Long Su, Alvin M. Despain
1994 B conf
A Study of Cache Hashing Functions for Symbolic Applications in Micro-Parallel Processors.
ICPADS
Ching-Long Su, Chin-Chi Teng, Alvin M. Despain
1994 A* conf
Branch with Masked Squashing in Superpipelined Processors.
ISCA
Ching-Long Su, Alvin M. Despain
1994 B conf
Hardware-software co-designing benchmark-driven superpipelined instruction set processors.
COMPSAC
Ching-Long Su, Alvin M. Despain
1994 — conf
Lower Power Architecture Design and Compilation Techniques for High-Performance Processors.
COMPCON
Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain
1994 A* conf
Minimizing branch misprediction penalties for superpipelined processors.
MICRO
Ching-Long Su, Alvin M. Despain
1994 J jnl
Saving Power in the Control Path of Embedded Processors.
IEEE Des. Test Comput.
Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain
1992 A* conf
Application-Driven Design Automation for Microprocessor Design.
DAC
Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain