Chinchun Meng

21 papers Journal 13Unranked 8
YearRankTypeTitle / Venue / Authors
2026 — conf
Compact Flip-Chip V-Band Fully Integrated Image Rejection Receiver Using 0.15 µm mHEMT Technology.
RWS
Chinchun Meng, Jen-Yi Su, Yan-Shen Chen, Guo-Wei Huang
2024 J jnl
Analysis and Design of a High-Coupling-Factor Marchand-Balun Variant Suitable for Standard Silicon IC Process and Its Wide-Band Gilbert Mixer Application.
IEEE Access
Chinchun Meng, Sheng-Che Tseng, Tsung-Mao Chao, Kuan-Chang Tsung
2020 — conf
Balanced Noise Design of Dual-Band 2.4/5-GHz pHEMT LNAs.
RWS
Chinchun Meng, Wei-ling Chang, Yu-Chih Hsiao, Meng-Che Li, Hsin-Yi Chien, Guo-Wei Huang
2019 J jnl
Analytical Noise Optimization of Single-/Dual-Band MOS LNAs With Substrate and Metal Loss Effects of Inductors.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wei-ling Chang, Chinchun Meng, Jung-Hung Ni, Kai-Chun Chang, Chih-Kai Chang, Po-Yi Lee, Yen-Lin Huang
2019 — conf
pHEMT Single-Voltage-Supply Direct-Conversion Receiver With a 3-10 GHz LC Ladder LNA.
RWS
Yu-Chih Hsiao, Chinchun Meng, Chia-Ling Wang, Guo-Wei Huang
2018 — conf
2-GHz 1.35-dB NF pHEMT single-voltage-supply process-independent low-noise amplifier.
RWS
Jin-Siang Syu, Chinchun Meng, Chun Yang, Guo-Wei Huang
2015 — conf
30-GHz mHEMT divide-by-three injection-locked frequency divider with Marchand balun.
RWS
Wei-ling Chang, Chinchun Meng, Kuan-Chang Tsung, Guo-Wei Huang
2013 — conf
2.4-GHz 7.4-mW 300-kHz flicker-noise-corner direct conversion receiver using 0.18 μm CMOS and deep-n-well NPN BJT.
RWS
Wei-ling Chang, Chinchun Meng, Jin-Siang Syu, Chia-Ling Wang, Guo-Wei Huang
2013 J jnl
A 2.4-GHz Low-Flicker-Noise CMOS Sub-Harmonic Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jin-Siang Syu, Chinchun Meng, Chia-Ling Wang
2012 — conf
High LO-to-RF isolation wideband gilbert upconversion micromixer using a phase-inverter rat-race coupler in 0.35µm SiGe HBT technology.
RWS
Jin-Siang Syu, Chinchun Meng, Po-Yi Wu
2011 — conf
Isolation performance of sub-harmonic Gilbert mixers.
ISOCC
Hung-Ju Wei, Chinchun Meng, Yi-Chen Lin
2009 J jnl
Analysis and Design of the 0.13- muhboxm CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tzung-Han Wu, Jin-Siang Syu, Chinchun Meng
2007 J jnl
10-GHz SiGe BiCMOS Sub-Harmonic Gilbert Mixer Using the Fully Symmetrical and Time-Delay Compensated LO Cells.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tzung-Han Wu, Chinchun Meng
2007 J jnl
4-GHz Inter-Stage-Matched SiGe HBT LNA with Gain Enhancement and No Noise Figure Degradation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Chinchun Meng, Jhin-Ci Jhong
2007 J jnl
A 5.2 GHz 47 dB Image Rejection Double Quadrature Gilbert Downconverter Using 0.35 µm SiGe HBT Technology.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tzung-Han Wu, Chinchun Meng, Tse-Hung Wu, Guo-Wei Huang
2006 J jnl
5.2/5.7-GHz 48-dB Image Rejection GaInP/GaAs HBT Weaver Down-Converter Using LO Frequency Quadrupler.
IEEE J. Solid State Circuits
Tzung-Han Wu, Chinchun Meng
2006 J jnl
The Effect of Selectively and Fully Ion-Implanted Collector on RF Characteristics of BJT Devices.
IEICE Trans. Electron.
Chinchun Meng, Jen-Yi Su, Bo-Chen Tsou, Guo-Wei Huang
2006 J jnl
The Port-to-Port Isolation of the Downconversion P-Type Micromixer Using Different N-Well Topologies.
IEICE Trans. Electron.
Sheng-Che Tseng, Chinchun Meng, Yang-Han Li, Guo-Wei Huang
2006 J jnl
True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers.
IEICE Trans. Electron.
Sheng-Che Tseng, Chinchun Meng, Wei-Yu Chen
2005 J jnl
A 5.7 GHz Gilbert Upconversion Mixer with an LC Current Combiner Output Using 0.35 µm SiGe HBT Technology.
IEICE Trans. Electron.
Tzung-Han Wu, Chinchun Meng, Tse-Hung Wu, Guo-Wei Huang
2005 J jnl
Determining GaInP/GaAs HBT Device Structure by DC Measurements on a Two-Emitter HBT Device and High Frequency Transit Time Measurements.
IEICE Trans. Electron.
Chinchun Meng, Bo-Chen Tsou, Sheng-Che Tseng