Chihun Lee

11 papers Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Process-aware and high-fidelity microstructure generation using stable diffusion.
CoRR
Hoang Cuong Phan, Minh Tien Tran, Chihun Lee, Hoheok Kim, Sehyok Oh, Dong-Kyu Kim, Ho Won Lee
2025 J jnl
Real-Time Hot-Rolled Coil Placement Recommendation System with Data-Driven Model.
Adv. Intell. Syst.
Chihun Lee, Da Seul Shin, Youn Hee Kang, Kanghyouk Choi, Dong Yong Park, Junsuk Rho
2020 J jnl
Development of Artificial Neural Network System to Recommend Process Conditions of Injection Molding for Various Geometries.
Adv. Intell. Syst.
Chihun Lee, Juwon Na, Kyongho Park, Hyeonjae Yu, Jongsun Kim, Kwonil Choi, Dongyong Park, Seongjin Park, Junsuk Rho, Seungchul Lee
2020 J jnl
Scalable and High-Throughput Top-Down Manufacturing of Optical Metasurfaces.
Sensors
Taejun Lee, Chihun Lee, Dong Kyo Oh, Trevon Badloe, Jong G. Ok, Junsuk Rho
2012 — conf
A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS.
ISSCC
Yuan-Hung Chung, Min Chen, Wei-Kai Hong, Jie-Wei Lai, Sheng-Jau Wong, Chien-Wei Kuan, Hong-Lin Chu, Chihun Lee, Chih-Fan Liao, Hsuan-Yu Liu, Hong-Kai Hsu, Li-chun Ko, Kuo-Hao Chen, Chao-Hsin Lu, Tsung-Ming Chen, YuLi Hsueh, Chunwei Chang, Yi-Hsien Cho, Chih-Hsien Shen, Yuan Sun, Eng-Chuan Low, Xudong Jiang, Deyong Hu, Weimin Shu, Jhy-Rong Chen, Jui-Lin Hsu, Chia-Jui Hsu, Jing-Hong Conan Zhan, Osama Shana'a, Guang-Kaai Dehng, George Chien
2009 J jnl
A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology.
IEEE J. Solid State Circuits
Lan-Chou Cho, Chihun Lee, Chao-Ching Hung, Shen-Iuan Liu
2008 J jnl
A 50.8-53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13- mum CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Chihun Lee, Lan-Chou Cho, Jia-Hao Wu, Shen-Iuan Liu
2007 J jnl
A 1.2-V 37-38.5-GHz Eight-Phase Clock Generator in 0.13-µm CMOS Technology.
IEEE J. Solid State Circuits
Lan-Chou Cho, Chihun Lee, Shen-Iuan Liu
2007 — conf
A 33.6-to-33.8Gb/s Burst-Mode CDR in 90nm CMOS.
ISSCC
Lan-Chou Cho, Chihun Lee, Shen-Iuan Liu
2007 — conf
A 58-to-60.4GHz Frequency Synthesizer in 90nm CMOS.
ISSCC
Chihun Lee, Shen-Iuan Liu
2006 — conf
A 44GHz Dual-Modulus Divide-by-4/5 Prescaler in 90nm CMOS Technology.
CICC
Chihun Lee, Lan-Chou Cho, Shen-Iuan Liu