Chih-Wei Jim Chang

11 papers A* 2A 4Journal 3Unranked 2
YearRankTypeTitle / Venue / Authors
2004 J jnl
Fast postplacement optimization using functional symmetries.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chih-Wei Jim Chang, Ming-Fu Hsiao, Bo Hu, Kai Wang, Malgorzata Marek-Sadowska, Chung-Kuan Cheng, Sao-Jie Chen
2003 J jnl
A new reasoning scheme for efficient redundancy addition and removal.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chih-Wei Jim Chang, Ming-Fu Hsiao, Malgorzata Marek-Sadowska
2002 A conf
ATPG-based logic synthesis: an overview.
ICCAD
Chih-Wei Jim Chang, Malgorzata Marek-Sadowska
2001 A conf
In-place delay constrained power optimization using functional symmetries.
DATE
Chih-Wei Jim Chang, Bo Hu, Malgorzata Marek-Sadowska
2001 A* conf
Layout-Driven Hot-Carrier Degradation Minimization Using Logic Restructuring Techniques.
DAC
Chih-Wei Jim Chang, Kai Wang, Malgorzata Marek-Sadowska
2001 A conf
Single-Pass Redundancy Addition and Removal.
ICCAD
Chih-Wei Jim Chang, Malgorzata Marek-Sadowska
2001 — conf
Who are the alternative wires in your neighborhood? (alternative wires identification without search).
ACM Great Lakes Symposium on VLSI
Chih-Wei Jim Chang, Malgorzata Marek-Sadowska
2000 A* conf
Fast post-placement rewiring using easily detectable functional symmetries.
DAC
Chih-Wei Jim Chang, Chung-Kuan Cheng, Peter Suaris, Malgorzata Marek-Sadowska
1989 J jnl
Fault-Tolerant Array Processors Using Single-Track Switches.
IEEE Trans. Computers
Sun-Yuan Kung, Shiann-Ning Jean, Chih-Wei Jim Chang
1988 — conf
Graceful Degradation Schemes for Static/Dynamic Wavefront Arrays.
ICPP (1)
Shiann-Ning Jean, Chih-Wei Jim Chang, Sun-Yuan Kung
1986 A conf
Real-Time Configuration for Fault-Tolerant VLSI Array Processors.
RTSS
Sun-Yuan Kung, Chih-Wei Jim Chang, Chein-Wei Jen