Chien-Chung Tsai

17 papers A* 2A 3C 1Journal 5Unranked 6
YearRankTypeTitle / Venue / Authors
2024 J jnl
Investigation of Laser Ablation Quality Based upon Entropy Analysis of Data Science.
Entropy
Chien-Chung Tsai, Tung-Hon Yiu
2003 — conf
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets.
ISQED
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Sudhakar M. Reddy
2002 — conf
Constraint Driven Pin Mapping for Concurrent SOC Testing.
ASP-DAC/VLSI Design
Yu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy
2002 J jnl
On Concurrent Test of Core-Based SOC Design.
J. Electron. Test.
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy
2002 A conf
Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm.
ITC
Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan
2002 J jnl
Synthesis of Scan Chains for Netlist Descriptions at RT-Level.
J. Electron. Test.
Yu Huang, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Wu-Tung Cheng, Sudhakar M. Reddy
2001 — conf
Effect of RTL coding style on testability.
CICC
Yu Huang, Chien-Chung Tsai, Nilanjan Mukherhee, Wu-Tung Cheng, Sudhakar M. Reddy
2001 A conf
On RTL scan design.
ITC
Yu Huang, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Dan Devries, Wu-Tung Cheng, Sudhakar M. Reddy
2001 — conf
Resource Allocation and Test Scheduling for Concurrent Test of Core-Based SoC D.
Asian Test Symposium
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy
1998 A conf
A novel combinational testability analysis by considering signal correlation.
ITC
Shih-Chieh Chang, Shi-Sen Chang, Wen-Ben Jone, Chien-Chung Tsai
1997 J jnl
Boolean Functions Classification via Fixed Polarity Reed-Muller Forms.
IEEE Trans. Computers
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1996 J jnl
Generalized Reed-Muller Forms as a Tool to Detect Symmetries.
IEEE Trans. Computers
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1996 — conf
Logic Synthesis for Testability.
Great Lakes Symposium on VLSI
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1996 A* conf
Multilevel Logic Synthesis for Arithmetic Functions.
DAC
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1994 A* conf
Boolean Matching Using Generalized Reed-Muller Forms.
DAC
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1994 C conf
Detecting Symmetric Variables in Boolean Functions using Generalized Reel-Muller Forms.
ISCAS
Chien-Chung Tsai, Malgorzata Marek-Sadowska
1993 — conf
Efficient minimization algorithms for fixed polarity AND/XOR canonical networks.
Great Lakes Symposium on VLSI
Chien-Chung Tsai, Malgorzata Marek-Sadowska