Chia-Chun Lin

48 papers A* 1A 4Misc 1Journal 23Unranked 19
YearRankTypeTitle / Venue / Authors
2025 J jnl
BreezyVoice: Adapting TTS for Taiwanese Mandarin with Enhanced Polyphone Disambiguation - Challenges and Insights.
CoRR
Chan-Jan Hsu, Yi-Cheng Lin, Chia-Chun Lin, Wei-Chih Chen, Ho-Lam Chung, Chen-An Li, Yi-Chang Chen, Chien-Yu Yu, Ming-Ji Lee, Chien-Cheng Chen, Ru-Heng Huang, Hung-yi Lee, Da-Shan Shiu
2023 J jnl
A Wearable Assistant Device for the Hearing Impaired to Recognize Emergency Vehicle Sirens with Edge Computing.
Sensors
Chiun-Li Chin, Chia-Chun Lin, Jingwen Wang, Wei-Cheng Chin, Yu-Hsiang Chen, Sheng-Wen Chang, Pei-Chen Huang, Xin Zhu, Yu-Lun Hsu, Shing-Hong Liu
2022 J jnl
Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
Majority Logic Circuit Minimization Using Node Addition and Removal.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
A General Equivalence Checking Framework for Multivalued Logic.
ASP-DAC
Chia-Chun Lin, Hsin-Ping Yen, Sheng-Hsiu Wei, Pei-Pei Chen, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
An Efficient Approximate Node Merging with an Error Rate Guarantee.
ASP-DAC
Kit Seng Tam, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
An IMU-aided Fitness System.
SoCC
Yi-Ting Lin, Chun-Jui Chen, Pei-Yi Kuo, Si-Huei Lee, Chia-Chun Lin, Yun-Ju Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
Cluster Tool Performance Analysis using Graph Database.
SoCC
Shiuan-Hau Huang, Hsin-Ping Yen, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 J jnl
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model.
ACM J. Emerg. Technol. Comput. Syst.
Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang
2021 — conf
On Reduction of Computations for Threshold Function Identification.
SoCC
Wen-Chih Hsu, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays.
ISQED
Hsin-Tsung Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2020 A conf
A Convolutional Result Sharing Approach for Binarized Neural Network Inference.
DATE
Ya-Chun Chang, Chia-Chun Lin, Yi-Ting Lin, Yung-Chih Chen, Chun-Yao Wang
2020 — conf
A Dynamic Expansion Order Algorithm for the SAT-based Minimization.
SoCC
Chia-Chun Lin, Kit Seng Tam, Chana-Cheng Ko, Hsin-Ping Yen, Shenz-Hsiu Wei, Yung-Chih Chen, Chun-Yao Wang
2020 J jnl
A New Necessary Condition for Threshold Function Identification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chia-Chun Lin, Chin-Heng Liu, Yung-Chih Chen, Chun-Yao Wang
2020 — conf
IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement.
ISQED
Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2020 J jnl
LOOPLock: Logic Optimization-Based Cyclic Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang
2020 — conf
Rehabilitation System for Limbs using IMUs.
ISQED
Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin, Yung-Chih Chen, Yun-Ju Lee, Chun-Yao Wang
2019 — conf
A Glitch Key-Gate for Logic Locking.
SoCC
De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2019 — conf
A Smart Single-Sensor Device for Instantaneously Monitoring Lower Limb Exercises.
SoCC
Yan-Ping Chang, Teng-Chia Wang, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2019 J jnl
Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita
2019 J jnl
Using Online User-Generated Reviews to Predict Offline Box-Office Sales and Online DVD Store Sales in the O2O Era.
J. Theor. Appl. Electron. Commer. Res.
Chieh Lee, Xun Xu, Chia-Chun Lin
2018 A conf
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.
DATE
Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 A conf
Logic optimization with considering boolean relations.
DATE
Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2018 J jnl
On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses.
IEEE Trans. Very Large Scale Integr. Syst.
Hsin-Pei Wang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 — conf
Using range-equivalent circuits for facilitating bounded sequential equivalence checking.
VLSI-DAT
Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang
2017 J jnl
An Efficient Indexing Method for Skyline Computations with Partially Ordered Domains.
IEEE Trans. Knowl. Data Eng.
Yu-Ling Hsueh, Chia-Chun Lin, Chia-Che Chang
2017 J jnl
An efficient approach to finding potential products continuously.
Inf. Syst.
Yu-Ling Hsueh, He Ma, Chia-Chun Lin, Roger Zimmermann
2017 — conf
In&Out: Restructuring for threshold logic network optimization.
ISQED
Chia-Chun Lin, Chiao-Wei Huang, Chun-Yao Wang, Yung-Chih Chen
2016 — conf
Traffic Anomalous Region Detection Model.
IIAI-AAI
Yu-Ling Hsueh, Wei-Li Lai, Chia-Chun Lin, Pierre Pascal Lindenberg
2015 J jnl
An adaptive reversible steganographic scheme based on the just noticeable distortion.
Multim. Tools Appl.
Chuan Qin, Chin-Chen Chang, Chia-Chun Lin
2015 J jnl
PAQCS: Physical Design-Aware Fault-Tolerant Quantum Circuit Synthesis.
IEEE Trans. Very Large Scale Integr. Syst.
Chia-Chun Lin, Susmita Sur-Kolay, Niraj K. Jha
2014 J jnl
FTQLS: Fault-Tolerant Quantum Logic Synthesis.
IEEE Trans. Very Large Scale Integr. Syst.
Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha
2014 J jnl
QLib: Quantum module library.
ACM J. Emerg. Technol. Comput. Syst.
Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha
2014 J jnl
RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits.
ACM J. Emerg. Technol. Comput. Syst.
Chia-Chun Lin, Niraj K. Jha
2014 A conf
Rewiring for threshold logic circuit minimization.
DATE
Chia-Chun Lin, Chun-Yao Wang, Yung-Chih Chen, Ching-Yi Huang
2013 J jnl
Optimized Quantum Gate Library for Various Physical Machine Descriptions.
IEEE Trans. Very Large Scale Integr. Syst.
Chia-Chun Lin, Amlan Chakrabarti, Niraj K. Jha
2012 J jnl
A novel multi-group exploiting modification direction method based on switch map.
Signal Process.
Xing-Tian Wang, Chin-Chen Chang, Chia-Chun Lin, Mingchu Li
2012 — conf
Design of Quantum Circuits for Random Walk Algorithms.
ISVLSI
Amlan Chakrabarti, Chia-Chun Lin, Niraj K. Jha
2012 — conf
Strong Tamper-Localization, Visual Secret Sharing Scheme Based on Exploiting Modification Direction.
AsiaJCIS
Chin-Chen Chang, Ngoc-Tu Huynh, Chia-Chun Lin
2012 J jnl
Transformation for adults in an Internet-based learning environment - is it necessary to be self-directed?
Br. J. Educ. Technol.
Regina Juchun Chu, Anita Zichun Chu, Cathy Weng, Chin-Chung Tsai, Chia-Chun Lin
2011 Misc conf
A mutual information based approach for evaluating the quality of clustering.
ICASSP
Shaikh Anowarul Fattah, Chia-Chun Lin, Sun-Yuan Kung
2008 — conf
A 242mW 10mm
ISSCC
Yu-Kun Lin, De-Wei Li, Chia-Chun Lin, Tzu-Yun Kuo, Sian-Jin Wu, Wei-Cheng Tai, Wei-Cheng Chang, Tian-Sheuan Chang
2008 A* conf
A 242mW, 10mm
DAC
Yu-Kun Lin, De-Wei Li, Chia-Chun Lin, Tzu-Yun Kuo, Sian-Jin Wu, Wei-Cheng Tai, Wei-Cheng Chang, Tian-Sheuan Chang
2008 J jnl
A Hardware-Efficient H.264/AVC Motion-Estimation Design for High-Definition Video.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yu-Kun Lin, Chia-Chun Lin, Tzu-Yun Kuo, Tian-Sheuan Chang
2007 — conf
PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding.
ICASSP (2)
Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang
2006 — conf
A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding.
APCCAS
Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang
2004 J jnl
Window Adaptive TCP for EGPRS Networks.
J. Inf. Sci. Eng.
Duan-Shin Lee, Chia-Chun Lin