Chia-Cheng Wu

18 papers A 3B 1C 4Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2024 C conf
DPC-Coded MIMO Multiuser Communications Using RIS with Discrete Phase Shifts.
ISITA
Chia-Cheng Wu, Hsiao-feng Lu
2021 J jnl
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model.
ACM J. Emerg. Technol. Comput. Syst.
Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang
2019 — conf
A Glitch Key-Gate for Logic Locking.
SoCC
De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2019 J jnl
Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita
2018 — conf
A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification.
ACM Great Lakes Symposium on VLSI
Chia-Cheng Wu, Tung-Yuan Lee, Yung-An Lai, Hsin-Pei Wang, De-Xuan Ji, Yan-Ping Chang, Teng-Chia Wang, Chin-Heng Liu, Chun-Yao Wang, Yung-Chih Chen
2018 — conf
Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate Arrays.
ISVLSI
Chia-Cheng Wu, Kung-Han Ho, Juinn-Dar Huang, Chun-Yao Wang
2018 A conf
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.
DATE
Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 A conf
Logic optimization with considering boolean relations.
DATE
Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2018 J jnl
On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses.
IEEE Trans. Very Large Scale Integr. Syst.
Hsin-Pei Wang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 — conf
Using range-equivalent circuits for facilitating bounded sequential equivalence checking.
VLSI-DAT
Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang
2017 — conf
Detection of tetracycline using isothermal amplification.
NEMS
Chia-Cheng Wu, Li-An Wu, Yih-Fan Chen, Lu-Ting Chou
2017 J jnl
Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Yun-Jui Li, Ching-Yi Huang, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan
2017 — conf
Majority logic circuits optimisation by node merging.
ASP-DAC
Chun-Che Chung, Yung-Chih Chen, Chun-Yao Wang, Chia-Cheng Wu
2016 C conf
Hybridtrace: A traceroute tool for hybrid networks composed of SDN and legacy switches.
ISCC
Shie-Yuan Wang, Chia-Cheng Wu, Chih-Liang Chou
2015 C conf
Constructing an optimal spanning tree over a hybrid network with SDN and legacy switches.
ISCC
Shie-Yuan Wang, Chia-Cheng Wu, Chih-Liang Chou
2014 A conf
An Environmental Monitoring System for Air Quality Control.
ICS
Chao-Tung Yang, Jung-Chun Liu, Yun-Ting Wang, Chia-Cheng Wu, Fang-Yie Leu
2014 B conf
Implementation of an environmental quality and harmful gases monitoring system.
SMARTCOMP
Chao-Tung Yang, Jung-Chun Liu, Yun-Ting Wang, Chia-Cheng Wu, Fang-Yie Leu
2013 C conf
On Construction of an Intelligent Environmental Monitoring System for Healthcare.
PDCAT
Chao-Tung Yang, Jung-Chun Liu, Chi-Jui Liao, Chia-Cheng Wu, Fang-Yie Leu