Chi-Yuan Lo

27 papers A* 12A 2B 2Misc 1Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2011 B conf
A Distributed Routing Protocol and Handover Schemes in Hybrid Vehicular Ad Hoc Networks.
ICPADS
Jang-Ping Sheu, Chi-Yuan Lo, Wei-Kai Hu
2009 B conf
A Wireless Human Motion Capturing System for Home Rehabilitation.
Mobile Data Management
Yu-Chee Tseng, Chin-Hao Wu, Fang-Jing Wu, Chi-Fu Huang, Chung-Ta King, Chun-Yu Lin, Jang-Ping Sheu, Chun-Yu Chen, Chi-Yuan Lo, Chien-Wen Yang, Chi-Wen Deng
2001 — conf
Parasitic extraction: current state of the art and future trends.
ISCAS (5)
William H. Kao, Chi-Yuan Lo, Raminderpal Singh, Mark Basel
2001 J jnl
Parasitic extraction: current state of the art and future trends.
Proc. IEEE
William H. Kao, Chi-Yuan Lo, Mark Basel, Raminderpal Singh
1995 J jnl
A cell-based hierarchical pitchmatching compaction using minimal LP.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
So-Zen Yao, Chung-Kuan Cheng, Debaprosad Dutt, Surendra Nahar, Chi-Yuan Lo
1995 Misc conf
Object oriented data modeling for VLSI/CAD.
VLSI Design
Anoop Singhal, Chi-Yuan Lo
1994 J jnl
A space-efficient short-finding algorithm [VLSI layouts].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shun-Lin Su, Charles H. Barry, Chi-Yuan Lo
1994 J jnl
Algorithms for Ham-Sandwich Cuts.
Discret. Comput. Geom.
Chi-Yuan Lo, Jirí Matousek, William L. Steiger
1993 A* conf
Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP.
DAC
So-Zen Yao, Chung-Kuan Cheng, Debaprosad Dutt, Surendra Nahar, Chi-Yuan Lo
1993 — conf
DDB: An Object Oriented Design Data Manager for VLSI CAD.
SIGMOD Conference
Anoop Singhal, Robert M. Arlein, Chi-Yuan Lo
1993 J jnl
HS: a hierarchical search package for CAD data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nishit P. Parikh, Chi-Yuan Lo, Anoop Singhal, Kwok W. Wu
1992 J jnl
An O(n log m) algorithm for VLSI design rule checking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Charles R. Bonapace, Chi-Yuan Lo
1992 A* conf
Ham-Sandwich Cuts in R^d
STOC
Chi-Yuan Lo, Jirí Matousek, William L. Steiger
1991 A* conf
On Minimal Closure Constraint Generation for Symbolic Cell Assembly.
DAC
Debaprosad Dutt, Chi-Yuan Lo
1990 A* conf
An O(
DAC
Chi-Yuan Lo, Ravi Varadarajan
1990 A conf
HS: A Hierarchical Search Package for CAD Data.
ICCAD
Nishit P. Parikh, Chi-Yuan Lo, Anoop Singhal, Kwok W. Wu
1989 A conf
A data model and architecture for VLSI/CAD databases.
ICCAD
Anoop Singhal, Nishit P. Parikh, Debaprosad Dutt, Chi-Yuan Lo
1989 A* conf
An Efficient Two-Dimensional Layout Compaction Algorithm.
DAC
Hyunchul Shin, Chi-Yuan Lo
1989 A* conf
An O(nlogm) Algorithm for VLSI Design Rule Checking.
DAC
Charles R. Bonapace, Chi-Yuan Lo
1989 A* conf
Automatic Tub Region Generation for Symbolic Layout Compaction.
DAC
Chi-Yuan Lo
1989 A* conf
GENAC: An Automatic Cell Synthesis Tool.
DAC
Chong-Leong Ong, Jeong-Tyng Li, Chi-Yuan Lo
1989 J jnl
Time-efficient VLSI artwork analysis algorithms in GOALIE2.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kuang-Wei Chiang, Surendra Nahar, Chi-Yuan Lo
1988 A* conf
Time Efficient VLSI Artwork Analysis Algorithms in GOALIE2.
DAC
Kuang-Wei Chiang, Surendra Nahar, Chi-Yuan Lo
1987 J jnl
Algorithms for an Advanced Fault Simulation System in MOTIS.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chi-Yuan Lo, Hao N. Nham, Ajoy K. Bose
1984 A* conf
The second generation motis mixed-mode simulator.
DAC
Chin-Fu Chen, Chi-Yuan Lo, Hao N. Nham, Prasad Subramaniam
1983 A* conf
A data structure for MOS circuits.
DAC
Chi-Yuan Lo, Hao N. Nham, Ajoy K. Bose
1982 A* conf
A fault simulator for MOS LSI circuits.
DAC
Ajoy K. Bose, Patrick Kozak, Chi-Yuan Lo, Hao N. Nham, Ernesto Pacas-Skewes, Kwok W. Wu