Chi-Sheng Lin

22 papers A 1C 2Journal 10Unranked 9
YearRankTypeTitle / Venue / Authors
2016 J jnl
Simultaneous and Anonymous Mobile Network Authentication Scheme Based on Chaotic Maps.
Inf. Technol. Control.
Wen-Chung Kuo, Chi-Sheng Lin, Chen-Tsun Chuang, Ming-Chih Kao
2013 J jnl
Performance evaluations of channel estimations in IEEE 802.11p environments.
Telecommun. Syst.
Chi-Sheng Lin, Che-Kang Sun, Jia-Chin Lin, Bo-Chiuan Chen
2013 J jnl
Physical-layer transceiving techniques on data-aided orthogonal frequency-division multiplexing towards seamless service on vehicular communications.
IET Commun.
Chi-Sheng Lin, Jia-Chin Lin
2013 J jnl
Vibration Analysis of Composite Laminate Plate Excited by Piezoelectric Actuators.
Sensors
Shiuh-Chuan Her, Chi-Sheng Lin
2012 J jnl
Wireless communication performance based on IEEE 802.11p R2V field trials.
IEEE Commun. Mag.
Jia-Chin Lin, Chi-Sheng Lin, Chih-Neng Liang, Bo-Chiuan Chen
2011 — conf
A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications.
CICC
Tsung-Che Lu, Lan-Da Van, Chi-Sheng Lin, Chun-Ming Huang
2011 J jnl
A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs
Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey
2010 C conf
An effective phase detector for phase-locked loops with wide capture range and fast acquisition time.
ISCAS
Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey
2010 J jnl
Deflection of Cross-Ply Composite Laminates Induced by Piezoelectric Actuators.
Sensors
Shiuh-Chuan Her, Chi-Sheng Lin
2010 C conf
High-speed and low-power programmable frequency divider.
ISCAS
Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Ying-Zong Juang, Chun-Ming Huang
2010 — conf
Improved time-domain channel estimation techniques in IEEE 802.11p environments.
CSNDSP
Chi-Sheng Lin, Jia-Chin Lin
2010 — conf
Novel Channel Estimation Techniques in IEEE 802.11p Environments.
VTC Spring
Chi-Sheng Lin, Jia-Chin Lin
2009 J jnl
An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops.
IEEE J. Solid State Circuits
Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang
2009 — conf
An edge-missing compensator for fast-settling wide-locking-range PLLs.
ISSCC
Ting-Hsu Chien, Chi-Sheng Lin, Ying-Zong Juang, Chun-Ming Huang, Chin-Long Wey
2009 — conf
Performance evaluations of channel estimations in IEEE 802.11p environments.
ICUMT
Chi-Sheng Lin, Che-Kang Sun, Jia-Chin Lin, Bo-Chiuan Chen
2006 — conf
A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design.
APCCAS
Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, Bin-Da Liu
2004 A conf
A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach.
ISLPED
Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu
2003 J jnl
A low-power precomputation-based fully parallel content-addressable memory.
IEEE J. Solid State Circuits
Chi-Sheng Lin, Jui-Chuan Chang, Bin-Da Liu
2003 J jnl
A new successive approximation architecture for low-power low-cost CMOS A/D converter.
IEEE J. Solid State Circuits
Chi-Sheng Lin, Bin-Da Liu
2003 — conf
Low-power and low-voltage fully parallel content-addressable memory.
ISCAS (5)
Chi-Sheng Lin, Kuan-Hua Chen, Bin-Da Liu
2002 — conf
A scalable sorting architecture based on maskable WTA/MAX circuit.
ISCAS (4)
Shin-Hong Ou, Chi-Sheng Lin, Bin-Da Liu
2002 — conf
Design of a pipelined and expandable sorting architecture with simple control scheme.
ISCAS (4)
Chi-Sheng Lin, Bin-Da Liu