Chi-Li Yu

14 papers A 1C 1Misc 1Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2013 J jnl
Hardware Acceleration for Neuromorphic Vision Algorithms.
J. Signal Process. Syst.
Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2012 — —
Multidimensional DFT IP Generators for FPGA Platforms.
Chi-Li Yu
2012 C conf
Transpose-free SAR imaging on FPGA platform.
ISCAS
Chi-Li Yu, Chaitali Chakrabarti
2011 A conf
A framework for accelerating neuromorphic-vision algorithms on FPGAs.
ICCAD
Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2011 — conf
A hardware architecture for accelerating neuromorphic vision algorithms.
SiPS
Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2011 J jnl
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.
J. Signal Process. Syst.
Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2011 — conf
FPGA-accelerator system for computing biologically inspired feature extraction models.
ACSCC
Michael DeBole, Yang Xiao, Chi-Li Yu, Ahmed Al-Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2011 J jnl
Multidimensional DFT IP Generator for FPGA Platforms.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2010 Misc conf
Bandwidth-intensive FPGA architecture for multi-dimensional DFT.
ICASSP
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan
2009 — conf
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data.
SiPS
Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2008 — conf
Efficient image reconstruction using partial 2D Fourier transform.
SiPS
Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan
2007 — conf
On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm.
SiPS
Chi-Li Yu, Tzu-Hao Yu, An-Yeu Wu
2006 — conf
On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems.
SiPS
Tzu-Hao Yu, Chi-Li Yu, Kai-Yuan Jheng, An-Yeu Wu
2001 — conf
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter.
ISCAS (4)
Chi-Li Yu, An-Yeu Wu