Chhandak Mukherjee

14 papers A 2C 2Journal 1Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	Multi-Partner Project: Smart Sensor Analog Front-Ends Powered by Emerging Reconfigurable Devices (SENSOTERIC). DATE Giulio Galderisi, Andreas Kramer, Andreas Fuchsberger, Jose Maria Gonzalez-Medina, Yuxuan He, Lee-Chi Hung, Marrit Jen Hong Li, Julian Kulenkampff, Maximilian Reuter, Lukas Wind, Masiar Sistani, Thomas Mikolajick, Bruno Neckel Wesling, Marina Deng, Cristell Maneux, Pieter Harpe, Sonia Prado-López, Oskar Baumgartner, Chhandak Mukherjee, Eugenio Cantatore, Sandro Carrara, Klaus Hofmann, Walter M. Weber, Jens Trommer
2024	A	`conf`	FVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation. DATE Ian O'Connor, Sara Mannaa, Alberto Bosio, Bastien Deveautour, Damien Deleruyelle, Tetiana Obukhova, Cédric Marchand, Jens Trommer, Çigdem Çakirlar, Bruno Neckel Wesling, Thomas Mikolajick, Oskar Baumgartner, Mischa Thesberg, David Pirker, Christoph Lenz, Zlatan Stanojevic, Markus Karner, Guilhem Larrieu, Sylvain Pelloquin, Konstantinous Moustakas, Jonas Müller, Giovanni Ansaloni, Alireza Amirshahi, David Atienza, Jean-Luc Rouas, Leila Ben Letaifa, Georgeta Bordeall, Charles Brazier, Chhandak Mukherjee, Marina Deng, Yifan Wang, Marc François, Houssem Rezgui, Reveil Lucas, Cristell Maneux
2023	—	`conf`	Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. ESSDERC Yifan Wang, Chhandak Mukherjee, Houssem Rezgui, Marina Deng, Cristell Maneux, Sara Mannaa, Ian O'Connor, Jonas Müller, Sylvain Pelloquin, Guilhem Larrieu
2023	J	`jnl`	InP DHBT Analytical Modeling: Toward THz Transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Marina Deng, Chhandak Mukherjee, Bertrand Ardouin, Cristell Maneux
2022	—	`conf`	A Logic Cell Design and routing Methodology Specific to VNWFET. NEWCAS Arnaud Poittevin, Ian O'Connor, Cédric Marchand, Alberto Bosio, Cristell Maneux, Chhandak Mukherjee, Guilhem Larrieu, Abhishek Kumar
2022	C	`conf`	Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors. VLSI-SoC Lucas Réveil, Chhandak Mukherjee, Cristell Maneux, Marina Deng, François Marc, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu, Arnaud Poittevin, Ian O'Connor, Oskar Baumgartner, David Pirker
2022	—	`conf`	InP DHBT test structure optimization towards 110 GHz characterization. ESSDERC Nil Davy, Marina Deng, Virginie Nodjiadjim, Chhandak Mukherjee, Muriel Riet, Colin Mismer, Jérémie Renaudier, Cristell Maneux
2021	—	`conf`	0.4-μm InP/InGaAs DHBT with a 380-GHz ${f_{T}}$, > 600-GHz $f_{\max}$ and BVCE0 > 4.5 V. BCICTS Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Marina Deng, Chhandak Mukherjee, Jérémie Renaudier, Cristell Maneux
2021	—	`conf`	Electro-Thermal Limitations and Device Degradation of SiGe HBTs with Emphasis on Circuit Performance. BCICTS Sébastien Fregonese, Chhandak Mukherjee, Holger Rücker, Pascal Chevalier, Gerhard Fischer, Didier Céli, Marina Deng, Marine Couret, François Marc, Cristell Maneux, Thomas Zimmer
2021	—	`conf`	InP DHBT Characterization up to 500 GHz and Compact Model Validation Towards THz Circuit Design. BCICTS Marina Deng, Chhandak Mukherjee, Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Jérémie Renaudier, Magali De Matos, Cristell Maneux
2020	C	`conf`	3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SOC Chhandak Mukherjee, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu
2020	—	`conf`	3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SoC (Selected Papers) Arnaud Poittevin, Chhandak Mukherjee, Ian O'Connor, Cristell Maneux, Guilhem Larrieu, Marina Deng, Sébastien Le Beux, François Marc, Aurélie Lecestre, Cédric Marchand, Abhishek Kumar
2019	—	`conf`	First Uni-Traveling Carrier Photodiode Compact Model Enabling Future Terahertz Communication System Design. ESSDERC Chhandak Mukherjee, Patrick Mounaix, Cristell Maneux, Michele Natrella, James Seddon, Chris Graham, Cyril C. Renaud
2017	—	`conf`	1/f Noise in 3D vertical gate-all-around junction-less silicon nanowire transistors. ESSDERC Chhandak Mukherjee, Cristell Maneux, Julien Pezard, Guilhem Larrieu