Cherrice Traver

12 papers A 1C 2Journal 4Unranked 5
YearRankTypeTitle / Venue / Authors
2005 J jnl
A Coarse-Grain Phased Logic CPU.
IEEE Trans. Computers
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2005 J jnl
Early evaluation for performance enhancement in phased logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger
2004 — conf
Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion.
ACM Great Lakes Symposium on VLSI
Kenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver
2003 — conf
A Coarse-Grain Phased Logic CPU.
ASYNC
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2003 — conf
A Fine-Grain Phased Logic CPU.
ISVLSI
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2002 A conf
Generalized Early Evaluation in Self-Timed Circuits.
DATE
Mitchell A. Thornton, Kenneth Fazel, Robert B. Reese, Cherrice Traver
2001 C conf
Arithmetic Logic Circuits Using Self-Timed Bit Level Dataflow and Early Evaluation.
ICCD
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2000 J jnl
The multidisciplinary international virtual design studio (MIVDS).
IEEE Trans. Educ.
Abdülkadir Erden, Aydan M. Erkmen, Ismet Erkmen, Ronald B. Bucinell, Cherrice Traver, Leila Notash
1996 J jnl
Guest Editorial Introduction to the Special Issue on the 1995 IEEE ASIC Conference.
IEEE Trans. Very Large Scale Integr. Syst.
K. W. Hsu, Cherrice Traver
1995 — conf
Analyzing and verifying locally clocked circuits with the concurrency workbench.
Great Lakes Symposium on VLSI
Garth Baulch, David Hemmendinger, Cherrice Traver
1993 C conf
A Comparison of Synchronous and Asynchronous FSMD Designs.
ICCD
Richard Auletta, Robert B. Reese, Cherrice Traver
1993 — conf
Rapid-prototyping of high-assurance systems.
Great Lakes Symposium on VLSI
Richard Auletta, Cherrice Traver