Cheong-Fat Chan

64 papers C 12Misc 2Journal 19Unranked 31
YearRankTypeTitle / Venue / Authors
2009 C conf
A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators.
ISCAS
Bing Li, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2008 J jnl
A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers.
IEEE Trans. Circuits Syst. II Express Briefs
Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan, Ka Nang Leung
2008 — conf
Enhanced channel selection using digital low-IF in Weaver receiver architecture.
APCCAS
Misteltein Pak-Kee Chan, Oliver Chiu-sing Choy, Kong-Pang Pun, Cheong-Fat Chan, Alex Ka Nang Leung
2007 J jnl
A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities.
J. VLSI Signal Process.
Wei Han, Kwok-Wai Hon, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2007 J jnl
Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing.
IEEE Trans. Circuits Syst. II Express Briefs
Ke Xu, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2007 J jnl
Priority-Based Heading One Detector in H.264/AVC Decoding.
EURASIP J. Embed. Syst.
Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006 — conf
0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application.
APCCAS
Wang-Chi Cheng, Cheong-Fat Chan, Suyi Tao, King-Keung Mok
2006 — conf
0.8 V GPS band CMOS VCO with 29% Tuning Range.
APCCAS
Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2006 C conf
A 0.5V fully differential OTA with local common feedback.
ISCAS
Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2006 C conf
A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm.
ISCAS
Chi-Hong Chan, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006 J jnl
A 75-dB image rejection IF-input quadrature-sampling SC ΣΔ Modulator.
IEEE J. Solid State Circuits
Kong-Pang Pun, Wang Tung Cheng, Chiu-sing Choy, Cheong-Fat Chan
2006 C conf
A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications.
ISCAS
Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2006 — conf
Adiabatic Smart Card.
APCCAS
King-Keung Mok, Ka-Hung Tsang, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006 C conf
An efficient MFCC extraction method in speech recognition.
ISCAS
Wei Han, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006 C conf
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application.
ISCAS
Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006 C conf
Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder.
ISCAS
Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006 — conf
Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System.
APCCAS
Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2005 — conf
A 75dB image rejection IF-input quadrature sampling SC ΣΔ modulator.
ESSCIRC
Wang Tung Cheng, Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan
2005 — conf
A speech recognizer with selectable model parameters.
ISCAS (6)
Wei Han, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun
2005 — conf
Active RC filter with reduced capacitance by current division technique.
ISCAS (4)
Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2005 — conf
Ramp voltage supply using adiabatic charging principle.
ISCAS (3)
Pui-Tak So, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun
2005 — conf
Realization of card-centric framework: a card-centric computer [smart cards].
ISCAS (5)
Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-Fat Chan, Kong-Pang Pun
2004 J jnl
A high-efficiency strongly self-checking asynchronous datapath.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jing-Ling Yang, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004 — conf
A low power asynchronous Java processor for contactless smart card.
ASP-DAC
Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-Fat Chan, Kong-Pang Pun
2004 J jnl
A low-latency asynchronous shift register.
IEEE Trans. Circuits Syst. II Express Briefs
Ragnarok Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004 J jnl
An I/Q mismatch-free switched-capacitor complex sigma-delta Modulator.
IEEE Trans. Circuits Syst. II Express Briefs
Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José Epifânio da Franca
2004 — conf
An IF input continuous-time sigma-delta analog-digital converter with high image rejection.
ICECS
Junhua Shen, Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan
2004 — conf
An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing.
ISCAS (1)
Wang Tung Cheng, Kong-Pang Pun, Cheong-Fat Chan, Chiu-sing Choy
2004 — conf
An asynchronous SOVA decoder for wireless communication application.
ISCAS (2)
Wing-Kin Chan, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004 C conf
Card-Centric Framework - Providing I/O Resources for Smart Cards.
CARDIS
Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004 J jnl
High Speed Curve Interpolating D/A Converter.
J. VLSI Signal Process.
Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy
2004 — conf
Pipelines in Dynamic Dual-Rail Circuits.
PATMOS
Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004 J jnl
Preparing smartcard for the future: from passive to active.
IEEE Trans. Consumer Electron.
Pak-Kee Chan, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2003 — conf
A low power asynchronous GF(2
ISCAS (5)
Pak-Keung Leung, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2003 — conf
An HMM-based speech recognition IC.
ISCAS (2)
Wei Han, Kwok-Wai Hon, Cheong-Fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching
2003 — conf
Clock recovery circuit with adiabatic technology (quasi-static CMOS logic).
ISCAS (2)
W. K. Yeung, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun
2003 Misc conf
Design for Self-Checking and Self-Timed Datapath.
VTS
Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2003 J jnl
Reversed nested Miller compensation with voltage buffer and nulling resistor.
IEEE J. Solid State Circuits
Kin-Pui Ho, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun
2002 — conf
A 1.2 V 900 MHz CMOS mixer.
ISCAS (5)
Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2002 — conf
A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter.
ISCAS (3)
Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy
2002 — conf
A 900 MHz 1.2 V CMOS mixer with high linearity.
APCCAS (1)
Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2002 — conf
A CMOS current feedback operational amplifier with active current mode compensation.
ISCAS (1)
Kin-Pui Ho, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun
2002 — conf
A Totally Self-Checking Dynamic Asynchronous Datapath.
Asian Test Symposium
Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2002 — conf
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.
ISCAS (4)
Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José E. Franca
2001 J jnl
A New Control Circuit for Asynchronous Micropipelines.
IEEE Trans. Computers
Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-Fat Chan
2001 — conf
A giga-hertz CMOS digital controlled oscillator.
ISCAS (4)
Lai-Kan Leung, Cheong-Fat Chan, Oliver Chiu-sing Choy
2001 — conf
A low power asynchronous DES.
ISCAS (4)
Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan
2001 — conf
A pipelined dataflow small micro-coded asynchronous processor and its application to DCT.
ISCAS (4)
Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan
2001 J jnl
A self-timed divider using a new fast and robust pipeline scheme.
IEEE J. Solid State Circuits
Jing-Ling Yang, Chiu-sing Choy, Cheong-Fat Chan
2001 J jnl
Asynchronous cross-pipelined multiplier.
IEEE J. Solid State Circuits
Jan Butas, Chiu-sing Choy, Juraj Povazanec, Cheong-Fat Chan
2000 C conf
An 8×8 adiabatic quasi-static CMOS multiplier.
ISCAS
Wing-Sum Mak, Cheong-Fat Chan, Ka-Wai Cheung, Chiu-sing Choy
2000 C conf
An ALU design using a novel asynchronous pipeline architecture.
ISCAS
Tin-Yau Tang, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan
2000 J jnl
CMOS high speed interpolators based on parallel architecture.
IEEE Trans. Consumer Electron.
Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy
2000 — conf
Design of self-timed asynchronous Booth's multiplier.
ASP-DAC
Tin-Y. Tang, Chiu-sing Choy, Pui-Lam Siu, Cheong-Fat Chan
2000 J jnl
High speed CMOS digital-to-analog converter with linear interpolator.
IEEE Trans. Consumer Electron.
Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy
1999 J jnl
A four-phase handshaking asynchronous static RAM design for self-timed systems.
IEEE J. Solid State Circuits
Vincent Wing-Yun Sit, Chiu-sing Choy, Cheong-Fat Chan
1999 J jnl
A self-timed ICT chip for image coding.
IEEE Trans. Circuits Syst. Video Technol.
Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham
1999 Misc conf
Pipelined Dataflow Architecture of a Small Processor.
PDPTA
Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-Fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-Ling Yang, Tin-yan Tang
1998 — conf
A Useful Micropipeline Architecture to Implement DSP Algorithms.
EUROMICRO
Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-Fat Chan
1998 — conf
Asynchronous logic in bit-serial arithmetic.
ICECS
Juraj Povazanec, Chiu-sing Choy, Cheong-Fat Chan
1997 — conf
Self-timed 1-D ICT processor.
ASP-DAC
Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham
1996 J jnl
Test Generation with Dynamic Probe Points in High Observability Testing Environment.
IEEE Trans. Computers
Oliver Chiu-sing Choy, Lap-kong Chan, Ray Chan, Cheong-Fat Chan
1995 C conf
A Feedback Control Circuit Design Technique to Suppress Power Noise in High Speed Output Driver.
ISCAS
Chiu-sing Choy, Cheong-Fat Chan, M. H. Ku
1994 C conf
Hardware emulation board based on FPGAs and programmable interconnections.
RSP
W. Y. Lo, Chiu-sing Choy, Cheong-Fat Chan