Chenming Hu - RankMe

87 papers A* 4A 5C 1Misc 1Journal 49Unranked 26

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	EDE-Distill: Boosting Event-Based Monocular Depth Estimation Performance via Knowledge Distillation. IEEE Robotics Autom. Lett. Chenming Hu, Junjie Jiang, Yaohui Li, Mingyuan Sun, Zheng Fang
2025	J	`jnl`	Fully Asynchronous Neuromorphic Perception for Mobile Robot Dodging With Loihi Chips. IEEE Trans Autom. Sci. Eng. Junjie Jiang, Delei Kong, Chenming Hu, Zheng Fang
2025	A*	`conf`	Optimal Brain Apoptosis. ICLR Mingyuan Sun, Zheng Fang, Jiaxu Wang, Junjie Jiang, Delei Kong, Chenming Hu, Yuetong Fang, Renjing Xu
2025	J	`jnl`	Optimal Brain Apoptosis. CoRR Mingyuan Sun, Zheng Fang, Jiaxu Wang, Junjie Jiang, Delei Kong, Chenming Hu, Yuetong Fang, Renjing Xu
2025	J	`jnl`	Orchard variable rate spraying method and experimental study based on multidimensional prescription maps. Comput. Electron. Agric. Chenming Hu, Yu Ru, Shuping Fang, Zifan Rong, Hongping Zhou, Xianghai Yan, Mengnan Liu
2025	J	`jnl`	Physics-Informed Neural Networks for Device and Circuit Modeling: A Case Study of NeuroSPICE. CoRR Chien-Ting Tung, Chenming Hu
2024	—	`conf`	3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size (25×33mm VLSI Technology and Circuits Bo-Jheng Shih, Yu-Ming Pan, Hao-Tung Chung, Chieh-Ling Lee, I-Chun Hsieh, Nein-Chih Lin, Chih-Chao Yang, Po-Tsang Huang, Hung-Ming Chen, Chiao-Yen Wang, Huan-Yu Chiu, Huang-Chung Cheng, Chang-Hong Shen, Wen-Fa Wu, Tuo-Hung Hou, Kuan-Neng Chen, Chenming Hu
2024	J	`jnl`	EV-MGRFlowNet: Motion-Guided Recurrent Network for Unsupervised Event-Based Optical Flow With Hybrid Motion-Compensation Loss. IEEE Trans. Instrum. Meas. Hao Zhuang, Zheng Fang, Xinjie Huang, Kuanxu Hou, Delei Kong, Chenming Hu
2024	J	`jnl`	Fully Asynchronous Neuromorphic Perception for Mobile Robot Dodging with Loihi Chips. CoRR Junjie Jiang, Delei Kong, Chenming Hu, Zheng Fang
2024	J	`jnl`	Spike-EVPR: Deep Spiking Residual Network with Cross-Representation Aggregation for Event-Based Visual Place Recognition. CoRR Chenming Hu, Zheng Fang, Kuanxu Hou, Delei Kong, Junjie Jiang, Hao Zhuang, Mingyuan Sun, Xinjie Huang
2023	J	`jnl`	EV-MGRFlowNet: Motion-Guided Recurrent Network for Unsupervised Event-based Optical Flow with Hybrid Motion-Compensation Loss. CoRR Hao Zhuang, Xinjie Huang, Kuanxu Hou, Delei Kong, Chenming Hu, Zheng Fang
2023	J	`jnl`	Planning the temporary takeoff/landing site's location for a pesticide spraying helicopter based on an intelligent fusion algorithm. Comput. Electron. Agric. Shuping Fang, Yu Ru, Chenming Hu, Fengbo Yang, Jiangkun Xue, Jie Zhou
2023	—	`conf`	Record Transconductance in Leff~30 nm Self-Aligned Replacement Gate ETSOI nFETs Using Low EOT Negative Capacitance HfO2-ZrO2 Superlattice Gate Stack. VLSI Technology and Circuits Li-Chen Wang, W. Li, Nirmaan Shanker, Suraj S. Cheema, Shang-Lin Hsu, S. Volkman, U. Sikder, Chirag Garg, J.-H. Park, Y.-H. Liao, Yen-Kai Lin, Chenming Hu, Sayeef S. Salahuddin
2023	J	`jnl`	Robust Compact Model of High-Voltage MOSFET's Drift Region. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Girish Pahwa, Ayushi Sharma, Ravi Goel, Garima Gill, Harshit Agarwal, Yogesh Singh Chauhan, Chenming Hu
2022	—	`conf`	Artificial Neural Network Surrogate Models for Efficient Design Space Exploration of 14-nm FinFETs. DRC Surila Guglani, Avirup Dasgupta, Ming-Yen Kao, Chenming Hu, Sourajeet Roy
2022	—	`conf`	Compact Model for Trap Assisted Tunneling based GIDL. DRC Chetan K. Dabhi, Girish Pahwa, Sayeef S. Salahuddin, Chenming Hu
2022	—	`conf`	On the PBTI Reliability of Low EOT Negative Capacitance 1.8 nm HfO2-ZrO2 Superlattice Gate Stack on Lg=90 nm nFETs. VLSI Technology and Circuits Nirmaan Shanker, Li-Chen Wang, Suraj S. Cheema, Wenshen Li, Nilotpal Choudhury, Chenming Hu, Souvik Mahapatra, Sayeef S. Salahuddin
2021	J	`jnl`	Siamese target estimation network with AIoU loss for real-time visual tracking. J. Vis. Commun. Image Represent. Zhiyong Li, Chenming Hu, Ke Nai, Jin Yuan
2020	J	`jnl`	A Density Metric for Semiconductor Technology [Point of View]. Proc. IEEE H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin
2020	J	`jnl`	Compact Device Models for FinFET and Beyond. CoRR Darsen D. Lu, Mohan V. Dunga, Ali M. Niknejad, Chenming Hu, Fu-Xiang Liang, Wei-Chen Hung, Jia-Wei Lee, Chun-Hsiang Hsu, Meng-Hsueh Chiang
2020	J	`jnl`	Investigation of a preliminary ventilation energy-recovery system for poultry houses. Comput. Electron. Agric. Longhuan Du, Chenming Hu, Chaowu Yang, Li Yang, Huarui Du, Qingyun Li, Chunlin Yu, Lingzhi Xie, Xiaosong Jiang
2020	J	`jnl`	Non-local attention association scheme for online multi-object tracking. Image Vis. Comput. Haidong Wang, Saizhou Wang, Jingyi Lv, Chenming Hu, Zhiyong Li
2020	—	`conf`	Reliability of Ferroelectric HfO2-based Memories: From MOS Capacitor to FeFET. DRC Ava J. Tan, Li-Chen Wang, Yu-Hung Liao, Jong-Ho Bae, Chenming Hu, Sayeef S. Salahuddin
2020	J	`jnl`	Scanning the Issue. Proc. IEEE H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin, Lei Deng, Xin-Guo Li, Song Han, Luping Shi, Yuan Xie, Elias Yaacoub, Mohamed-Slim Alouini, Ahmed Douik, Hayssam Dahrouj, Tareq Y. Al-Naffouri
2019	—	`conf`	BSIM-BULK: Accurate Compact Model for Analog and RF Circuit Design. CICC Chetan Gupta, Ravi Goel, Harshit Agarwal, Chenming Hu, Yogesh Singh Chauhan
2019	J	`jnl`	Computational Fluid Dynamics aided investigation and optimization of a tunnel-ventilated poultry house in China. Comput. Electron. Agric. Longhuan Du, Chaowu Yang, Robert Dominy, Li Yang, Chenming Hu, Huarui Du, Qingyun Li, Chunlin Yu, Lingzhi Xie, Xiaosong Jiang
2019	J	`jnl`	Investigation of bio-aerosol dispersion in a tunnel-ventilated poultry house. Comput. Electron. Agric. Longhuan Du, Li Yang, Chaowu Yang, Robert Dominy, Chenming Hu, Huarui Du, Qingyun Li, Chunlin Yu, Lingzhi Xie, Xiaosong Jiang
2017	A	`conf`	Full chip power benefits with negative capacitance FETs. ISLPED Sandeep Kumar Samal, Sourabh Khandelwal, Asif Islam Khan, Sayeef S. Salahuddin, Chenming Hu, Sung Kyu Lim
2017	Misc	`conf`	Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs. VLSID Avirup Dasgupta, Chetan Gupta, Anupam Dutta, Yen-Kai Lin, Srikanth Srihari, Ethirajan Tamilmani, Chenming Hu, Yogesh Singh Chauhan
2016	J	`jnl`	Thermal resistance modeling in FDSOI transistors with industry standard model BSIM-IMG. Microelectron. J. Pragya Kushwaha, K. Bala Krishna, Harshit Agarwal, Sourabh Khandelwal, Juan Pablo Duarte, Chenming Hu, Yogesh Singh Chauhan
2015	—	`conf`	BSIM-CMG: Standard FinFET compact model for advanced circuit design. ESSCIRC Juan Pablo Duarte, Sourabh Khandelwal, Aditya Sankar Medury, Chenming Hu, Pragya Kushwaha, Harshit Agarwal, Avirup Dasgupta, Yogesh Singh Chauhan
2015	J	`jnl`	Modeling STI Edge Parasitic Current for Accurate Circuit Simulations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sourabh Khandelwal, Harshit Agarwal, Juan Pablo Duarte, Kaiman Chan, Sagnik Dey, Yogesh Singh Chauhan, Chenming Hu
2013	J	`jnl`	BSIM - SPICE Models Enable FinFET and UTB IC Designs. IEEE Access Navid Paydavosi, Sriramkumar Venugopalan, Yogesh Singh Chauhan, Juan Pablo Duarte, Srivatsava Jandhyala, Ali M. Niknejad, Chenming Hu
2013	—	`conf`	Flicker noise in advanced CMOS technology: Effects of halo implant. ESSDERC Navid Paydavosi, Sriramkumar Venugopalan, Angada B. Sachid, Ali Niknejad, Chenming Hu, Sagnik Dey, Samuel Martin, Xin Zhang
2012	—	`conf`	A non-iterative physical procedure for RF CMOS compact model extraction using BSIM6. CICC Sriramkumar Venugopalan, Krishnanshu Dandu, Samuel Martin, Richard Taylor, Claude Cirba, Xin Zhang, Ali M. Niknejad, Chenming Hu
2012	—	`conf`	BSIM - Industry standard compact MOSFET models. ESSCIRC Yogesh Singh Chauhan, Sriramkumar Venugopalan, Mohammed A. Karim, Sourabh Khandelwal, Navid Paydavosi, Pankaj Thakur, Ali M. Niknejad, Chenming Hu
2012	—	`conf`	Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology. ESSCIRC Maria-Anna Chalkiadaki, Anurag Mangla, Christian C. Enz, Yogesh Singh Chauhan, Mohammed Ahosan Ul Karim, Sriramkumar Venugopalan, Ali Niknejad, Chenming Hu
2011	—	`book`	BSIM4 and MOSFET Modeling For IC Simulation Weidong Liu, Chenming Hu
2011	A*	`conf`	New sub-20nm transistors: why and how. DAC Chenming Hu
2010	J	`jnl`	Compact Modeling of Variation in FinFET SRAM Cells. IEEE Des. Test Comput. Darsen D. Lu, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu
2008	J	`jnl`	BSIM - making the first international standard MOSFET model. Sci. China Ser. F Inf. Sci. Chenming Hu
2005	—	`conf`	Charge-Based Core and the Model Architecture of BSIM5. ISQED Jin He, Jane Xi, Mansun Chan, Hui Wan, Mohan V. Dunga, Babak Heydari, Ali M. Niknejad, Chenming Hu
2005	J	`jnl`	Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. IEEE Trans. Very Large Scale Integr. Syst. Yu Cao, Xuejue Huang, Dennis Sylvester, Tsu-Jae King, Chenming Hu
2004	—	`conf`	A Non-Charge-Sheet Based Analytical Model of Undoped Symmetric Double-Gate MOSFETs Using SPP Approach. ISQED Jin He, Xuemei Xi, Mansun Chan, Chung-Hsun Lin, Ali Niknejad, Chenming Hu
2004	—	`conf`	The next generation BSIM for sub-100nm mixed-signal circuit simulation. CICC Xuemei Xi, Jin He, Mohan V. Dunga, Chung-Hsun Lin, Babak Heydari, Hui Wan, Mansun Chan, Ali M. Niknejad, Chenming Hu
2003	—	`conf`	A scaleable model for STI mechanical stress effect on layout dependence of MOS electrical characteristics. CICC Ke-Wei Su, Yi-Ming Sheu, Chung-Kai Lin, Sheng-Jier Yang, Wen-Jya Liang, Xuemei Xi, Chung-Shi Chiang, Jaw-Kang Her, Yu-Tai Chia, Carlos H. Diaz, Chenming Hu
2003	—	`conf`	A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation. CICC Pin Su, Samel K. H. Fung, Peter W. Wyatt, Hui Wan, Mansun Chan, Ali M. Niknejad, Chenming Hu
2003	J	`jnl`	Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Takashi Sato, Yu Cao, Kanak Agarwal, Dennis Sylvester, Chenming Hu
2003	J	`jnl`	Extremely scaled silicon nano-CMOS devices. Proc. IEEE Leland Chang, Yang-Kyu Choi, Daewon Ha, Pushkar Ranade, Shiying Xiong, Jeffrey Bokor, Chenming Hu, Tsu-Jae King
2003	J	`jnl`	Frequency-independent equivalent-circuit model for on-chip spiral inductors. IEEE J. Solid State Circuits Yu Cao, Robert A. Groves, Xuejue Huang, Noah Zamdmer, Jean-Olivier Plouchart, Richard A. Wachnik, Tsu-Jae King, Chenming Hu
2003	J	`jnl`	Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. Very Large Scale Integr. Syst. Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester
2003	J	`jnl`	Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. IEEE J. Solid State Circuits Xuejue Huang, Phillip J. Restle, Thomas J. Bucelot, Yu Cao, Tsu-Jae King, Chenming Hu
2003	J	`jnl`	Practical compact modeling approaches and options for sub-0.1 mum CMOS technologies. Microelectron. Reliab. Mansun Chan, Xuemei Xi, Jin He, Kanyu M. Cao, Mohan V. Dunga, Ali M. Niknejad, Ping K. Ko, Chenming Hu
2002	J	`jnl`	Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. IEEE Trans. Very Large Scale Integr. Syst. Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu
2002	—	`conf`	Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. ASP-DAC/VLSI Design Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylvester, Chenming Hu
2002	—	`conf`	Frequency-independent equivalent circuit model for on-chip spiral inductors. CICC Yu Cao, Robert A. Groves, Noah Zamdmer, Jean-Olivier Plouchart, Richard A. Wachnik, Xuejue Huang, Tsu-Jae King, Chenming Hu
2002	J	`jnl`	Impact of spatial intrachip gate length variability on theperformance of high-speed digital circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu
2002	—	`conf`	Studying the Impact of Gate Tunneling on Dynamic Behaviors of Partially-Depleted SOI CMOS Using BSIMPD. ISQED Pin Su, Samel K. H. Fung, Weidong Liu, Chenming Hu
2001	J	`jnl`	Accurate in situ measurement of peak noise and delay change induced by interconnect coupling. IEEE J. Solid State Circuits Takashi Sato, Dennis Sylvester, Yu Cao, Chenming Hu
2001	—	`conf`	Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. ISQED Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie
2001	J	`jnl`	Efficient generation of pre-silicon MOS model parameters for early circuit design. IEEE J. Solid State Circuits Michael Orshansky, Judy An, Chun Jiang, Bill Liu, Concetta Riccobene, Chenming Hu
2001	—	`conf`	Methodology of self-heating free parameter extraction and circuit simulation for SOI CMOS. CICC Hajime Nakayama, Pin Su, Chenming Hu, Motoaki Nakamura, Hiroshi Komatsu, Kaneyoshi Takeshita, Yasutoshi Komatsu
2001	J	`jnl`	Scaling CMOS devices through alternative structures. Sci. China Ser. F Inf. Sci. Chenming Hu
2000	J	`jnl`	A simple subcircuit extension of the BSIM3v3 model for CMOS RF design. IEEE J. Solid State Circuits Suet Fong Tin, Ashraf A. Osman, Kartikeya Mayaram, Chenming Hu
2000	—	`conf`	BSIMPD: a partial-depletion SOI MOSFET model for deep-submicron CMOS designs. CICC Pin Su, Samuel K. H. Fung, Stephen Tang, Fariborz Assaderaghi, Chenming Hu
2000	A	`conf`	Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. ICCAD Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester
2000	A	`conf`	Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. ICCAD Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu
2000	—	`conf`	New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation. CICC Yu Cao, Takashi Sato, Michael Orshansky, Dennis Sylvester, Chenming Hu
1999	J	`jnl`	Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages. IEEE J. Solid State Circuits Nick Lindert, Toshihiro Sugii, Stephen Tang, Chenming Hu
1999	A*	`conf`	On Thermal Effects in Deep Sub-Micron VLSI Interconnects. DAC Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu
1999	J	`jnl`	Performance and reliability comparison between asymmetric and symmetric LDD devices and logic gates. IEEE J. Solid State Circuits Jone F. Chen, Jiang Tao, Peng Fang, Chenming Hu
1998	A*	`conf`	A Statistical Performance Simulation Methodology for VLSI Circuits. DAC Michael Orshansky, James C. Chen, Chenming Hu
1998	J	`jnl`	A unified MOSFET channel charge model for device modeling in circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yuhua Cheng, Kai Chen, Kiyotaka Imai, Chenming Hu
1998	—	`conf`	Design in hot-carrier reliability for high performance logic applications. CICC Peng Fang, Jiang Tao, Jone F. Chen, Chenming Hu
1998	J	`jnl`	Investigation of interconnect capacitance characterization using charge-based capacitance measurement (CBCM) technique and three-dimensional simulation. IEEE J. Solid State Circuits Dennis Sylvester, James C. Chen, Chenming Hu
1998	J	`jnl`	Performance and V IEEE J. Solid State Circuits Kai Chen, Chenming Hu
1998	—	`conf`	Performance and reliability of asymmetric LDD devices and logic gates. CICC Jone F. Chen, Jiang Tao, Peng Fang, Chenming Hu
1997	A	`conf`	Device and technology optimizations for low power design in deep sub-micron regime. ISLPED Kai Chen, Chenming Hu
1996	A	`conf`	Device design for low power electronics with accurate deep submicrometer LDD-MOSFET models. ISLPED Kai Chen, Yuhua Cheng, Chenming Hu
1994	J	`jnl`	Hot-carrier-reliability design guidelines for CMOS logic circuits. IEEE J. Solid State Circuits Khandker N. Quader, Eric R. Minami, Wei-Jen Huang, Ping K. Ko, Chenming Hu
1993	J	`jnl`	Berkeley reliability tools-BERT. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Robert H. Tu, Elyse Rosenbaum, Wilson Y. Chan, Chester C. Li, Eric R. Minami, Khandker N. Quader, Ping K. Ko, Chenming Hu
1993	J	`jnl`	Future CMOS scaling and reliability. Proc. IEEE Chenming Hu
1992	J	`jnl`	A non-quasi-static MOSFET model for SPICE-AC analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hong June Park, Ping Keung Ko, Chenming Hu
1992	J	`jnl`	IC reliability simulation. IEEE J. Solid State Circuits Chenming Hu
1991	J	`jnl`	A charge conserving non-quasi-state (NQS) MOSFET model for SPICE transient analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hong June Park, Ping Keung Ko, Chenming Hu
1991	J	`jnl`	A charge sheet capacitance model of short channel MOSFETs for SPICE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hong June Park, Ping Keung Ko, Chenming Hu
1989	C	`conf`	Reliability issues of MOS and bipolar ICs. ICCD Chenming Hu