Chengning Wang

19 papers A* 2A 2B 1C 3Misc 1Journal 9Unranked 1
YearRankTypeTitle / Venue / Authors
2024 A* conf
STAGGER: Enabling All-in-One Subarray Sensing for Efficient Module-level Processing in Open-Bitline ReRAM.
DAC
Chengning Wang, Dan Feng, Yuchong Hu, Wei Tong, Jingning Liu
2023 J jnl
A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wei Zhao, Jie Xu, Xueliang Wei, Bing Wu, Chengning Wang, Weilin Zhu, Wei Tong, Dan Feng, Jingning Liu
2023 J jnl
APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wei Zhao, Dan Feng, Wei Tong, Jingning Liu, Zhangyu Chen, Bing Wu, Chengning Wang
2023 A* conf
CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays.
DAC
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu
2023 C conf
ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based Accelerators.
ICCD
Jinpeng Liu, Wei Tong, Bing Wu, Huan Cheng, Chengning Wang
2022 J jnl
Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Yiran Chen
2021 J jnl
EnTiered-ReRAM: An Enhanced Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.
IEEE Access
Yang Zhang, Zhibin Yu, Liang Gu, Chengning Wang, Dan Feng
2021 J jnl
Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chengning Wang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Bing Wu, Wei Zhao, Linghao Song, Yang Zhang, Jie Xu, Xueliang Wei, Yiran Chen
2021 J jnl
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage.
IEEE Trans. Computers
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Wei Zhao, Yang Zhang, Yiran Chen
2021 A conf
Improving the energy efficiency of STT-MRAM based approximate cache.
DATE
Wei Zhao, Wei Tong, Dan Feng, Jingning Liu, Zhangyu Chen, Jie Xu, Bing Wu, Chengning Wang, Bo Liu
2020 J jnl
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Yang Zhang
2020 B conf
CCHL: Compression-Consolidation Hardware Logging for Efficient Failure-Atomic Persistent Memory Updates.
ICPP
Xueliang Wei, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Liuqing Ye
2019 J jnl
Cross-point Resistive Memory: Nonideal Properties and Solutions.
ACM Trans. Design Autom. Electr. Syst.
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Zheng Li, Jiayi Chang, Yang Zhang, Bing Wu, Jie Xu, Wei Zhao, Yilin Li, Ruoxi Ren
2019 C conf
ReRAM Crossbar-Based Analog Computing Architecture for Naive Bayesian Engine.
ICCD
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Mengye Peng
2019 Misc conf
Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.
MSST
Yang Zhang, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Jie Xu
2018 A conf
Aliens: a novel hybrid architecture for resistive random-access memory.
ICCAD
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Shuai Li, Mingshun Yang, Chengning Wang, Yang Zhang
2018 — conf
Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture.
ISPA/IUCC/BDCloud/SocialCom/SustainCom
Yang Zhang, Dan Feng, Zhipeng Tan, Jingning Liu, Wei Tong, Chengning Wang
2018 J jnl
CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System.
ACM Trans. Archit. Code Optim.
Yang Zhang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Zhipeng Tan, Chengning Wang, Bing Wu, Zheng Li, Gaoxiang Xu
2017 C conf
DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory.
ICCD
Chengning Wang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Yang Zhang