Cheng Tan - RankMe

45 papers A* 9A 8B 1C 4Misc 2Journal 11Unranked 10

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Neura: A Unified Framework for Hierarchical and Adaptive CGRAs. ASPLOS (2) Cheng Tan, Miaomiao Jiang, Yuqi Sun, Ruihong Yin, Yanghui Ou, Qing Zhong, Lei Ju, Jeff Zhang
2025	—	`conf`	Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning. ASPLOS (1) Zhaoying Li, Pranav Dangi, Chenyang Yin, Thilini Kaushalya Bandara, Rohan Juneja, Cheng Tan, Zhenyu Bai, Tulika Mitra
2025	J	`jnl`	MALTA: An Automated CGRA Design Framework. CoRR Zesong Jiang, Yuqi Sun, Qing Zhong, Mahathi Krishna, Deepak Patil, Cheng Tan, Sriram Krishnamoorthy, Jeff Zhang
2025	—	`conf`	PICACHU: Plug-In CGRA Handling Upcoming Nonlinear Operations in LLMs. ASPLOS (2) Jiajun Qin, Tianhua Xia, Cheng Tan, Jeff Zhang, Sai Qian Zhang
2025	A*	`conf`	Rewire: Advancing CGRA Mapping Through a Consolidated Routing Paradigm. DAC Zhaoying Li, Dan Wu, Dhananjaya Wijerathne, Dan Chen, Huize Li, Cheng Tan, Tulika Mitra
2025	J	`jnl`	TL: Automatic End-to-End Compiler of Tile-Based Languages for Spatial Dataflow Architectures. CoRR Wei Li, Zhenyu Bai, Heru Wang, Pranav Dangi, Zhiqiang Zhang, Cheng Tan, Huiying Lan, Weng-Fai Wong, Tulika Mitra
2024	J	`jnl`	Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning. CoRR Zhaoying Li, Pranav Dangi, Chenyang Yin, Thilini Kaushalya Bandara, Rohan Juneja, Cheng Tan, Zhenyu Bai, Tulika Mitra
2024	A*	`conf`	FHE-CGRA: Enable Efficient Acceleration of Fully Homomorphic Encryption on CGRAs. DAC Miaomiao Jiang, Yilan Zhu, Honghui You, Cheng Tan, Zhaoying Li, Jiming Xu, Lei Ju
2024	—	`conf`	Fused Functional Units for Area-Efficient CGRAs. ISQED Ron Jokai, Cheng Tan, Jeff Jun Zhang
2024	A*	`conf`	ICED: An Integrated CGRA Framework Enabling DVFS-Aware Acceleration. MICRO Cheng Tan, Miaomiao Jiang, Deepak Patil, Yanghui Ou, Zhaoying Li, Lei Ju, Tulika Mitra, Hyunchul Park, Antonino Tumeo, Jeff Zhang
2024	A	`conf`	SmartFuse: Reconfigurable Smart Switches to Accelerate Fused Collectives in HPC Applications. ICS Pouya Haghi, Cheng Tan, Anqi Guo, Chunshu Wu, Dongfang Liu, Ang Li, Anthony Skjellum, Tong Geng, Martin C. Herbordt
2024	C	`conf`	Understanding Mixed Precision GEMM with MPGemmFI: Insights into Fault Resilience. CLUSTER Bo Fang, Xinyi Li, Harvey Dam, Cheng Tan, Siva Kumar Sastry Hari, Timothy Tsai, Ignacio Laguna, Dingwen Tao, Ganesh Gopalakrishnan, Prashant J. Nair, Kevin J. Barker, Ang Li
2023	A	`conf`	FLASH: FPGA-Accelerated Smart Switches with GCN Case Study. ICS Pouya Haghi, William Krska, Cheng Tan, Tong Geng, Po Hao Chen, Connor Greenwood, Anqi Guo, Thomas M. Hines, Chunshu Wu, Ang Li, Anthony Skjellum, Martin C. Herbordt
2023	A*	`conf`	ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs. DAC YiXuan Luo, Cheng Tan, Nicolas Bohm Agostini, Ang Li, Antonino Tumeo, Nirav Dave, Tong Geng
2023	J	`jnl`	MPGemmFI: A Fault Injection Technique for Mixed Precision GEMM in ML Applications. CoRR Bo Fang, Xinyi Li, Harvey Dam, Cheng Tan, Siva Kumar Sastry Hari, Timothy Tsai, Ignacio Laguna, Dingwen Tao, Ganesh Gopalakrishnan, Prashant J. Nair, Kevin J. Barker, Ang Li
2023	A	`conf`	VecPAC: A Vectorizable and Precision-Aware CGRA. ICCAD Cheng Tan, Deepak Patil, Antonino Tumeo, Gabriel Weisz, Steven K. Reinhardt, Jeff Zhang
2022	B	`conf`	A Framework for Neural Network Inference on FPGA-Centric SmartNICs. FPL Anqi Guo, Tong Geng, Yongan Zhang, Pouya Haghi, Chunshu Wu, Cheng Tan, Yingyan Lin, Ang Li, Martin C. Herbordt
2022	A	`conf`	ASAP: automatic synthesis of area-efficient and precision-aware CGRAs. ICS Cheng Tan, Thierry Tambe, Jeff Jun Zhang, Bo Fang, Tong Geng, Gu-Yeon Wei, David Brooks, Antonino Tumeo, Ganesh Gopalakrishnan, Ang Li
2022	A	`conf`	An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration. ICCAD Nicolas Bohm Agostini, Serena Curzel, Vinay Amatya, Cheng Tan, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, David R. Kaeli, Antonino Tumeo
2022	J	`jnl`	Bridging Python to Silicon: The SODA Toolchain. IEEE Micro Nicolas Bohm Agostini, Serena Curzel, Jeff Jun Zhang, Ankur Limaye, Cheng Tan, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, David Brooks, Gu-Yeon Wei, Antonino Tumeo
2022	A*	`conf`	DRIPS: Dynamic Rebalancing of Pipelined Streaming Applications on CGRAs. HPCA Cheng Tan, Nicolas Bohm Agostini, Tong Geng, Chenhao Xie, Jiajia Li, Ang Li, Kevin J. Barker, Antonino Tumeo
2022	Misc	`conf`	FCsN: A FPGA-Centric SmartNIC Framework for Neural Networks. FCCM Anqi Guo, Tong Geng, Yongan Zhang, Pouya Haghi, Chunshu Wu, Cheng Tan, Yingyan Lin, Ang Li, Martin C. Herbordt
2022	J	`jnl`	I-GCN: A Graph Convolutional Network Accelerator with Runtime Locality Enhancement through Islandization. CoRR Tong Geng, Chunshu Wu, Yongan Zhang, Cheng Tan, Chenhao Xie, Haoran You, Martin C. Herbordt, Yingyan Lin, Ang Li
2022	—	`conf`	SO(DA) PARMA-DITAM@HiPEAC Antonino Tumeo, Nicolas Bohm Agostini, Serena Curzel, Ankur Limaye, Cheng Tan, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Ang Li, Joseph B. Manzano
2021	—	`conf`	A Survey: Handling Irregularities in Neural Network Acceleration with FPGAs. HPEC Tong Geng, Chunshu Wu, Cheng Tan, Chenhao Xie, Anqi Guo, Pouya Haghi, Sarah Yuan He, Jiajia Li, Martin C. Herbordt, Ang Li
2021	J	`jnl`	ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing. IEEE Trans. Parallel Distributed Syst. Cheng Tan, Chenhao Xie, Tong Geng, Andres Marquez, Antonino Tumeo, Kevin J. Barker, Ang Li
2021	A	`conf`	AURORA: Automated Refinement of Coarse-Grained Reconfigurable Accelerators. DATE Cheng Tan, Chenhao Xie, Ang Li, Kevin J. Barker, Antonino Tumeo
2021	A	`conf`	Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators. ICCAD Serena Curzel, Nicolas Bohm Agostini, Shihao Song, Ismet Dagli, Ankur Limaye, Cheng Tan, Marco Minutoli, Vito Giovanni Castellana, Vinay Amatya, Joseph B. Manzano, Anup Das, Fabrizio Ferrandi, Antonino Tumeo
2021	C	`conf`	DynPaC: Coarse-Grained, Dynamic, and Partially Reconfigurable Array for Streaming Applications. ICCD Cheng Tan, Tong Geng, Chenhao Xie, Nicolas Bohm Agostini, Jiajia Li, Ang Li, Kevin J. Barker, Antonino Tumeo
2021	A*	`conf`	I-GCN: A Graph Convolutional Network Accelerator with Runtime Locality Enhancement through Islandization. MICRO Tong Geng, Chunshu Wu, Yongan Zhang, Cheng Tan, Chenhao Xie, Haoran You, Martin C. Herbordt, Yingyan Lin, Ang Li
2021	—	`conf`	OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays. ASAP Cheng Tan, Nicolas Bohm Agostini, Jeff Zhang, Marco Minutoli, Vito Giovanni Castellana, Chenhao Xie, Tong Geng, Ang Li, Kevin J. Barker, Antonino Tumeo
2021	—	`conf`	Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis. ASAP Jeff Jun Zhang, Nicolas Bohm Agostini, Shihao Song, Cheng Tan, Ankur Limaye, Vinay Amatya, Joseph B. Manzano, Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Gu-Yeon Wei, David Brooks
2021	A*	`conf`	Ultra-Elastic CGRAs for Irregular Loop Specialization. HPCA Christopher Torng, Peitian Pan, Yanghui Ou, Cheng Tan, Christopher Batten
2020	J	`jnl`	ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing. CoRR Cheng Tan, Chenhao Xie, Andres Marquez, Antonino Tumeo, Kevin J. Barker, Ang Li
2020	—	`conf`	CQNN: a CGRA-based QNN Framework. HPEC Tong Geng, Chunshu Wu, Cheng Tan, Bo Fang, Ang Li, Martin C. Herbordt
2020	C	`conf`	OpenCGRA: An Open-Source Unified Framework for Modeling, Testing, and Evaluating CGRAs. ICCD Cheng Tan, Chenhao Xie, Ang Li, Kevin J. Barker, Antonino Tumeo
2020	A	`conf`	SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators. ICCAD Marco Minutoli, Vito Giovanni Castellana, Cheng Tan, Joseph B. Manzano, Vinay Amatya, Antonino Tumeo, David Brooks, Gu-Yeon Wei
2019	C	`conf`	PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks. ICCD Cheng Tan, Yanghui Ou, Shunning Jiang, Peitian Pan, Christopher Torng, Shady Agwa, Christopher Batten
2019	J	`jnl`	Synergy: An HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. ACM Trans. Embed. Comput. Syst. Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra
2018	A*	`conf`	Dnestmap: mapping deeply-nested loops on ultra-low power CGRAs. DAC Manupa Karunaratne, Cheng Tan, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2018	J	`jnl`	LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. ACM Trans. Embed. Comput. Syst. Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2018	A*	`conf`	Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables. ISCA Cheng Tan, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2018	J	`jnl`	Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. CoRR Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra
2016	Misc	`conf`	LOCUS: low-power customizable many-core architecture for wearables. CASES Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2015	—	`conf`	Approximation-aware scheduling on heterogeneous multi-core architectures. ASP-DAC Cheng Tan, Thannirmalai Somu Muthukaruppan, Tulika Mitra, Lei Ju