Cheng Liu - RankMe

119 papers A* 14A 11B 4C 2Misc 3Journal 68Unranked 14

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Is quantum optimization ready? An effort towards neural network compression using adiabatic quantum computing. Future Gener. Comput. Syst. Zhehui Wang, Benjamin Chen Ming Choong, Tian Huang, Daniel Gerlinghoff, Rick Siow Mong Goh, Cheng Liu, Tao Luo
2026	J	`jnl`	Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures. CoRR Zizhen Liu, Fangzhiyi Wang, Mengdi Wang, Jing Ye, Hayden Kwok-Hay So, Cheng Liu, Huawei Li
2026	J	`jnl`	Neuro-Symbolic Verification on Instruction Following of LLMs. CoRR Yiming Su, Kunzhao Xu, Yanjie Gao, Fan Yang, Cheng Liu, Mao Yang, Tianyin Xu
2026	J	`jnl`	On the Vulnerability of FHE Computation to Silent Data Corruption. CoRR Jianan Mu, Ge Yu, Zhaoxuan Kan, Song Bian, Liang Kong, Zizhen Liu, Cheng Liu, Jing Ye, Huawei Li
2025	A	`conf`	DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs. SC Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2025	J	`jnl`	Enabling Energy-Efficient Deployment of Large Language Models on Memristor Crossbar: A Synergy of Large and Small. IEEE Trans. Pattern Anal. Mach. Intell. Zhehui Wang, Tao Luo, Cheng Liu, Weichen Liu, Rick Siow Mong Goh, Weng-Fai Wong
2025	J	`jnl`	From Large to Small: Transferring CUDA Optimization Expertise via Reasoning Graph. CoRR Junfeng Gong, Zhiyi Wei, Junying Chen, Cheng Liu, Huawei Li
2025	A*	`conf`	FrontOrder: Frontier-Guided Graph Reordering. ICDE Xinmiao Zhang, Cheng Liu, Shengwen Liang, Chenwei Xiong, Yu Zhang, Lei Zhang, Huawei Li, Xiaowei Li
2025	B	`conf`	Frontier-guided Graph Reordering. PPoPP Xinmiao Zhang, Cheng Liu, Shengwen Liang, Chenwei Xiong, Yu Zhang, Lei Zhang, Huawei Li, Xiaowei Li
2025	B	`conf`	Graphitron: A Domain Specific Language for FPGA-Based Graph Processing Accelerator Generation. LCTES Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Lei Zhang, Cheng Liu
2025	J	`jnl`	Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems. CoRR Benjamin Chen Ming Choong, Tao Luo, Cheng Liu, Bingsheng He, Wei Zhang, Joey Tianyi Zhou
2025	—	`conf`	HisOrder: A Historical Frontier-Aware Graph Reordering for Efficient BFS. FCPC@PPOPP Xinmiao Zhang, Xiaorong Qin, Lei Zhang, Cheng Liu
2025	J	`jnl`	Is Quantum Optimization Ready? An Effort Towards Neural Network Compression using Adiabatic Quantum Computing. CoRR Zhehui Wang, Benjamin Chen Ming Choong, Tian Huang, Daniel Gerlinghoff, Rick Siow Mong Goh, Cheng Liu, Tao Luo
2025	A*	`conf`	LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator. HPCA Guoyu Li, Shengyu Ye, Chunyun Chen, Yang Wang, Fan Yang, Ting Cao, Cheng Liu, Mohamed M. Sabry Aly, Mao Yang
2025	J	`jnl`	Large Processor Chip Model. CoRR Kaiyan Chang, Mingzhi Chen, Yunji Chen, Zhirong Chen, Dongrui Fan, Junfeng Gong, Nan Guo, Yinhe Han, Qinfen Hao, Shuo Hou, Xuanjing Huang, Pengwei Jin, Changxin Ke, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Li, Shengwen Liang, Cheng Liu, Hongwei Liu, Jiahua Liu, Junliang Lv, Jianan Mu, Jin Qin, Bin Sun, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wang, Chenggang Wu, Peiyang Wu, Teng Wu, Xiao Xiao, Mengyao Xie, Chenwei Xiong, Ruiyuan Xu, Mingyu Yan, Xiaochun Ye, Kuai Yu, Rui Zhang, Shuoming Zhang, Jiacheng Zhao
2025	A*	`conf`	NeuVSA: A Unified and Efficient Accelerator for Neural Vector Search. HPCA Ziming Yuan, Lei Dai, Wen Li, Jie Zhang, Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li, Jiafeng Guo, Peng Wang, Renhai Chen, Gong Zhang
2025	A	`conf`	Taijigraph: an Out-Of-Core Graph Processing System Enhanced with Computational Storage. IPDPS Xinmiao Zhang, Cheng Liu, Shengwen Liang, Hayden Kwok-Hay So, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2025	J	`jnl`	Understanding and Mitigating Errors of LLM-Generated RTL Code. CoRR Jiazheng Zhang, Cheng Liu, Huawei Li
2024	J	`jnl`	A Deep Reinforcement Learning-Based Preemptive Approach for Cost-Aware Cloud Job Scheduling. IEEE Trans. Sustain. Comput. Long Cheng, Yue Wang, Feng Cheng, Cheng Liu, Zhiming Zhao, Ying Wang
2024	J	`jnl`	A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yintao He, Bing Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2024	A	`conf`	AGC: A Unified Architecture for Accelerating K-Nearest Neighbor Graph Construction in Vector Search. ICCAD Lei Dai, Ziming Yuan, Wen Li, Shengwen Liang, Kaiwei Zou, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2024	J	`jnl`	Adaptive Soft Error Protection for Deep Learning. CoRR Xinghua Xue, Cheng Liu
2024	J	`jnl`	Advancements in Accelerating Deep Neural Network Inference on AIoT Devices: A Survey. IEEE Trans. Sustain. Comput. Long Cheng, Yan Gu, Qingzhi Liu, Lei Yang, Cheng Liu, Ying Wang
2024	J	`jnl`	An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mingkai Chen, Cheng Liu, Shengwen Liang, Lei He, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024	J	`jnl`	ApproxPilot: A GNN-based Accelerator Approximation Framework. CoRR Qing Zhang, Cheng Liu, Siting Liu, Yajuan Hui, Huawei Li, Xiaowei Li
2024	J	`jnl`	DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs. CoRR Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024	J	`jnl`	Enabling Energy-Efficient Deployment of Large Language Models on Memristor Crossbar: A Synergy of Large and Small. CoRR Zhehui Wang, Tao Luo, Cheng Liu, Weichen Liu, Rick Siow Mong Goh, Weng-Fai Wong
2024	J	`jnl`	Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation. CoRR Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Cheng Liu, Huawei Li, Xiaowei Li
2024	A	`conf`	HLSPilot: LLM-based High-Level Synthesis. ICCAD Chenwei Xiong, Cheng Liu, Huawei Li, Xiaowei Li
2024	J	`jnl`	HLSPilot: LLM-based High-Level Synthesis. CoRR Chenwei Xiong, Cheng Liu, Huawei Li, Xiaowei Li
2024	J	`jnl`	IICPilot: An Intelligent Integrated Circuit Backend Design Framework Using Open EDA. CoRR Zesong Jiang, Qing Zhang, Cheng Liu, Huawei Li, Xiaowei Li
2024	J	`jnl`	In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated SOT-MRAM Crossbar Arrays. IEEE Trans. Very Large Scale Integr. Syst. Yajuan Hui, Qingzhen Li, Leimin Wang, Cheng Liu, Deming Zhang, Xiangshui Miao
2024	J	`jnl`	Logic-in-Memory Based on Majority Gates With Voltage-Gated SOT-MRAM Crossbar Arrays. IEEE Trans. Circuits Syst. II Express Briefs Yajuan Hui, Qingzhen Li, Cheng Liu, Deming Zhang, Xiangshui Miao
2024	J	`jnl`	MCU-MixQ: A HW/SW Co-optimized Mixed-precision Neural Network Design Framework for MCUs. CoRR Junfeng Gong, Cheng Liu, Long Cheng, Huawei Li, Xiaowei Li
2024	J	`jnl`	MRFI: An Open-Source Multiresolution Fault Injection Framework for Neural Network Processing. IEEE Trans. Very Large Scale Integr. Syst. Haitong Huang, Cheng Liu, Xinghua Xue, Bo Liu, Huawei Li, Xiaowei Li
2024	J	`jnl`	PDG: A Prefetcher for Dynamic Graph Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xinmiao Zhang, Cheng Liu, Jiacheng Ni, Yuanqing Cheng, Lei Zhang, Huawei Li, Xiaowei Li
2024	J	`jnl`	SigDLA: A Deep Learning Accelerator Extension for Signal Processing. CoRR Fangfa Fu, Wenyu Zhang, Zesong Jiang, Zhiyu Zhu, Guoyu Li, Bing Yang, Cheng Liu, Liyi Xiao, Jinxiang Wang, Huawei Li, Xiaowei Li
2023	J	`jnl`	A Framework for Neural Network Architecture and Compile Co-optimization. ACM Trans. Embed. Comput. Syst. Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Cheng Liu, Lei Zhang
2023	J	`jnl`	Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. ACM Trans. Design Autom. Electr. Syst. Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li
2023	J	`jnl`	ApproxABFT: Approximate Algorithm-Based Fault Tolerance for Vision Transformers. CoRR Xinghua Xue, Cheng Liu, Haitong Huang, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023	—	`book`	Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design - A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach Xiaowei Li, Guihai Yan, Cheng Liu
2023	J	`jnl`	Cross-Layer Optimization for Fault-Tolerant Deep Learning. CoRR Qing Zhang, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Huawei Li, Xiaowei Li
2023	J	`jnl`	Deep Learning Accelerator in Loop Reliability Evaluation for Autonomous Driving. CoRR Haitong Huang, Cheng Liu
2023	A	`conf`	DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. ICCAD Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li
2023	J	`jnl`	DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. CoRR Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li
2023	J	`jnl`	Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance. IEEE Trans. Very Large Scale Integr. Syst. Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023	J	`jnl`	Exploring Winograd Convolution for Cost-effective Neural Network Fault Tolerance. CoRR Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023	A	`conf`	Layer-Puzzle: Allocating and Scheduling Multi-task on Multi-core NPUs by Using Layer Heterogeneity. DATE Chengsi Gao, Ying Wang, Cheng Liu, Mengdi Wang, Weiwei Chen, Yinhe Han, Lei Zhang
2023	A*	`conf`	MA-BERT: Towards Matrix Arithmetic-only BERT Inference by Eliminating Complex Non-Linear Functions. ICLR Neo Wei Ming, Zhehui Wang, Cheng Liu, Rick Siow Mong Goh, Tao Luo
2023	J	`jnl`	MRFI: An Open Source Multi-Resolution Fault Injection Framework for Neural Network Processing. CoRR Haitong Huang, Cheng Liu, Xinghua Xue, Ying Wang, Huawei Li, Xiaowei Li
2023	J	`jnl`	Network Pruning for Bit-Serial Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
2023	J	`jnl`	On-Line Fault Protection for ReRAM-Based Neural Networks. IEEE Trans. Computers Wen Li, Ying Wang, Cheng Liu, Yintao He, Lian Liu, Huawei Li, Xiaowei Li
2023	J	`jnl`	Reliability Analysis of Vision Transformers. CoRR Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023	J	`jnl`	S$^{2}$ Loop: A Lightweight Spectral-Spatio Loop Closure Detector for Resource-Constrained Platforms. IEEE Robotics Autom. Lett. Yuquan He, Long Zhang, Cheng Liu, Lei Zhang, Ying Wang
2023	J	`jnl`	Soft Error Reliability Analysis of Vision Transformers. IEEE Trans. Very Large Scale Integr. Syst. Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023	J	`jnl`	Statistical Modeling of Soft Error Influence on Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li
2023	J	`jnl`	Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang
2023	J	`jnl`	Variation Enhanced Attacks Against RRAM-based Neuromorphic Computing System. CoRR Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang
2022	J	`jnl`	Fault-Tolerant Deep Learning: A Hierarchical Perspective. CoRR Cheng Liu, Zhen Gao, Siting Liu, Xuefei Ning, Huawei Li, Xiaowei Li
2022	J	`jnl`	Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems. J. Syst. Archit. Benjamin Chen Ming Choong, Tao Luo, Cheng Liu, Bingsheng He, Wei Zhang, Joey Tianyi Zhou
2022	J	`jnl`	HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2022	A	`conf`	NoCeption: A Fast PPA Prediction Framework for Network-on-Chips Using Graph Neural Network. DATE Fuping Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2022	A*	`conf`	Processing-in-SRAM acceleration for ultra-low power visual 3D perception. DAC Yuquan He, Songyun Qu, Gangliang Lin, Cheng Liu, Lei Zhang, Ying Wang
2022	C	`conf`	Reexamining CGRA Memory Sub-system for Higher Memory Utilization and Performance. ICCD Lei Dai, Ying Wang, Cheng Liu, Fuping Li, Huawei Li, Xiaowei Li
2022	Misc	`conf`	Special Session: Fault-Tolerant Deep Learning: A Hierarchical Perspective. VTS Cheng Liu, Zhen Gao, Siting Liu, Xuefei Ning, Huawei Li, Xiaowei Li
2022	J	`jnl`	Statistical Modeling of Soft Error Influence on Neural Networks. CoRR Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li
2022	J	`jnl`	Taming Process Variations in CNFET for Efficient Last-Level Cache Design. IEEE Trans. Very Large Scale Integr. Syst. Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Huawei Li, Xiaowei Li
2022	A*	`conf`	VStore: in-storage graph based vector search accelerator. DAC Shengwen Liang, Ying Wang, Ziming Yuan, Cheng Liu, Huawei Li, Xiaowei Li
2022	J	`jnl`	Winograd Convolution: A Perspective from Fault Tolerance. CoRR Xinghua Xue, Haitong Huang, Cheng Liu, Ying Wang, Tao Luo, Lei Zhang
2022	A*	`conf`	Winograd convolution: a perspective from fault tolerance. DAC Xinghua Xue, Haitong Huang, Cheng Liu, Tao Luo, Lei Zhang, Ying Wang
2021	B	`conf`	CHaNAS: coordinated search for network architecture and scheduling policy. LCTES Weiwei Chen, Ying Wang, Gangliang Lin, Chengsi Gao, Cheng Liu, Lei Zhang
2021	J	`jnl`	EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE Trans. Computers Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li
2021	J	`jnl`	Energy-Efficient Accelerator Design for Deformable Convolution Networks. CoRR Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021	A*	`conf`	GCiM: A Near-Data Processing Accelerator for Graph Construction. DAC Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li
2021	—	`conf`	GLIST: Towards In-Storage Graph Learning. USENIX ATC Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li
2021	J	`jnl`	HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning. CoRR Dawen Xu, Qianlong Wang, Cheng Liu, Cheng Chu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021	—	`conf`	MT-DLA: An Efficient Multi-Task Deep Learning Accelerator Design. ACM Great Lakes Symposium on VLSI Mengdi Wang, Bing Li, Ying Wang, Cheng Liu, Xiaohan Ma, Xiandong Zhao, Lei Zhang
2021	A*	`conf`	NASA: Accelerating Neural Network Design with a NAS Processor. ISCA Xiaohan Ma, Chang Si, Ying Wang, Cheng Liu, Lei Zhang
2021	J	`jnl`	Network-Aware Locality Scheduling for Distributed Data Operators in Data Centers. IEEE Trans. Parallel Distributed Syst. Long Cheng, Ying Wang, Qingzhi Liu, Dick H. J. Epema, Cheng Liu, Ying Mao, John Murphy
2021	A*	`conf`	Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization. DAC Mengdi Wang, Ying Wang, Cheng Liu, Lei Zhang
2021	A*	`conf`	PicoVO: A Lightweight RGB-D Visual Odometry Targeting Resource-Constrained IoT Devices. ICRA Yuquan He, Ying Wang, Cheng Liu, Lei Zhang
2021	J	`jnl`	R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. IEEE Trans. Very Large Scale Integr. Syst. Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021	J	`jnl`	R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors. CoRR Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021	J	`jnl`	Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. IEEE Trans. Very Large Scale Integr. Syst. Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Shuang Zhao, Lei Zhang, Huaguo Liang, Huawei Li, Kwang-Ting Cheng
2021	A*	`conf`	TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning. DAC Yintao He, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2021	J	`jnl`	Taming Process Variations in CNFET for Efficient Last Level Cache Design. CoRR Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Yuanqing Cheng, Huawei Li, Xiaowei Li
2021	—	`conf`	VADER: Leveraging the Natural Variation of Hardware to Enhance Adversarial Attack. ASP-DAC Hao Lv, Bing Li, Ying Wang, Cheng Liu, Lei Zhang
2020	C	`conf`	A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators. ICCD Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng
2020	J	`jnl`	Accelerating Generative Neural Networks on Unmodified Deep Learning Processors - A Software Approach. IEEE Trans. Computers Dawen Xu, Cheng Liu, Ying Wang, Kaijie Tu, Bingsheng He, Lei Zhang
2020	A*	`conf`	BitPruner: Network Pruning for Bit-serial Accelerators. DAC Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
2020	A	`conf`	CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. DATE Dawen Xu, Kexin Chu, Cheng Liu, Ying Wang, Lei Zhang, Huawei Li
2020	A	`conf`	DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. ICCAD Shengwen Liang, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li
2020	A	`conf`	Energy Efficient In-memory Integer Multiplication Based on Racetrack Memory. ICDCS Tao Luo, Wei Zhang, Bingsheng He, Cheng Liu, Douglas L. Maskell
2020	A*	`conf`	Linear Symmetric Quantization of Neural Networks for Low-precision Integer Hardware. ICLR Xiandong Zhao, Ying Wang, Xuyi Cai, Cheng Liu, Lei Zhang
2020	—	`conf`	Multi-task Scheduling for PIM-based Heterogeneous Computing System. ACM Great Lakes Symposium on VLSI Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li
2020	—	`conf`	Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System. ASAP Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Huawei Li, Lei Zhang, Kwang-Ting Cheng
2019	J	`jnl`	A Survey on Graph Processing Accelerators: Challenges and Opportunities. CoRR Chuangyi Gui, Long Zheng, Bingsheng He, Cheng Liu, Xinyu Chen, Xiaofei Liao, Hai Jin
2019	J	`jnl`	A Survey on Graph Processing Accelerators: Challenges and Opportunities. J. Comput. Sci. Technol. Chuangyi Gui, Long Zheng, Bingsheng He, Cheng Liu, Xinyu Chen, Xiaofei Liao, Hai Jin
2019	—	`ch.`	Emerging Hardware Technologies. Encyclopedia of Big Data Technologies Xuntao Cheng, Cheng Liu, Bingsheng He
2019	—	`conf`	Exploring emerging CNFET for efficient last level cache design. ASP-DAC Dawen Xu, Li Li, Ying Wang, Cheng Liu, Huawei Li
2019	B	`conf`	InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. FPL Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2019	—	`conf`	OBFS: OpenCL Based BFS Optimizations on Software Programmable FPGAs. FPT Cheng Liu, Xinyu Chen, Bingsheng He, Xiaofei Liao, Ying Wang, Lei Zhang
2019	—	`conf`	Resilient Neural Network Training for Accelerators with Computing Errors. ASAP Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Yulin Dai, Long Cheng, Huawei Li, Lei Zhang
2019	—	`conf`	Squeezing the Last MHz for CNN Acceleration on FPGAs. ITC-Asia Li Li, Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li
2018	A	`conf`	FCN-engine: accelerating deconvolutional layers in classic CNN processors. ICCAD Dawen Xu, Kaijie Tu, Ying Wang, Cheng Liu, Bingsheng He, Huawei Li
2017	—	`conf`	A Virtual Channel Allocation Algorithm for NoC. MLICOM (2) Dongxing Bao, Xiaoming Li, Yizong Xin, Jiuru Yang, Xiangshi Ren, Fangfa Fu, Cheng Liu
2017	J	`jnl`	A Virtual Channel Allocation Algorithm for NoC. EAI Endorsed Trans. Ambient Syst. Dongxing Bao, Xiaoming Li, Yizong Xin, Jiuru Yang, Xiangshi Ren, Fangfa Fu, Cheng Liu
2016	J	`jnl`	A Soft Processor Overlay with Tightly-coupled FPGA Accelerator. CoRR Ho-Cheung Ng, Cheng Liu, Hayden Kwok-Hay So
2016	—	`ch.`	FPGA Overlays. FPGAs for Software Programmers Hayden Kwok-Hay So, Cheng Liu
2016	J	`jnl`	Monetary Cost Optimizations for Hosting Workflow-as-a-Service in IaaS Clouds. IEEE Trans. Cloud Comput. Amelie Chi Zhou, Bingsheng He, Cheng Liu
2015	J	`jnl`	Automatic Nested Loop Acceleration on FPGAs Using Soft CGRA Overlay. CoRR Cheng Liu, Ho-Cheung Ng, Hayden Kwok-Hay So
2015	Misc	`conf`	Automatic Soft CGRA Overlay Customization for High-Productivity Nested Loop Acceleration on FPGAs. FCCM Cheng Liu, Hayden Kwok-Hay So
2015	J	`jnl`	Economizing TSV Resources in 3-D Network-on-Chip Design. IEEE Trans. Very Large Scale Integr. Syst. Ying Wang, Yinhe Han, Lei Zhang, Binzhang Fu, Cheng Liu, Huawei Li, Xiaowei Li
2015	—	`conf`	QuickDough: A rapid FPGA loop accelerator design framework using soft CGRA overlay. FPT Cheng Liu, Ho-Cheung Ng, Hayden Kwok-Hay So
2013	Misc	`conf`	A Soft Coarse-Grained Reconfigurable Array Based High-level Synthesis Methodology: Promoting Design Productivity and Exploring Extreme FPGA Frequency. FCCM Cheng Liu, Colin Yu Lin, Hayden Kwok-Hay So
2013	J	`jnl`	Probabilistic Scheduling of Scientific Workflows in Dynamic Cloud Environments. CoRR Amelie Chi Zhou, Bingsheng He, Cheng Liu
2013	J	`jnl`	RevivePath: Resilient Network-on-Chip Design Through Data Path Salvaging of Router. J. Comput. Sci. Technol. Yinhe Han, Cheng Liu, Hang Lu, Wen-Bo Li, Lei Zhang, Xiaowei Li
2011	—	`conf`	A resilient on-chip router design through data path salvaging. ASP-DAC Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li
2011	—	`conf`	Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip. ASP-DAC Cheng Liu, Lei Zhang, Yinhe Han, Xiaowei Li