Cheng-Wu Lin

12 papers A* 2A 1C 1Journal 7Unranked 1
YearRankTypeTitle / Venue / Authors
2020 J jnl
Optimizing the Sensor Placement for Foot Plantar Center of Pressure without Prior Knowledge Using Deep Reinforcement Learning.
Sensors
Cheng-Wu Lin, Shanq-Jang Ruan, Wei-Chun Hsu, Ya-Wen Tu, Shao-Li Han
2015 J jnl
A capacitance-ratio quantification design for linearity test in differential top-plate sampling sar ADCS.
Int. J. Circuit Theory Appl.
An-Sheng Chao, Cheng-Wu Lin, Hsin-Wen Ting, Soon-Jyh Chang
2014 J jnl
A Low-Cost Stimulus Design for Linearity Test in SAR ADCs.
IEICE Trans. Electron.
An-Sheng Chao, Cheng-Wu Lin, Hsin-Wen Ting, Soon-Jyh Chang
2013 J jnl
Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops.
IEEE Trans. Very Large Scale Integr. Syst.
Ya-Ting Shyu, Jai-Ming Lin, Chun-Po Huang, Cheng-Wu Lin, Ying-Zu Lin, Soon-Jyh Chang
2012 C conf
A power-efficient sizing methodology of SAR ADCs.
ISCAS
Chun-Po Huang, Soon-Jyh Chang, Guan-Ying Huang, Cheng-Wu Lin
2012 A conf
Analytical-based approach for capacitor placement with gradient error compensation and device correlation enhancement in analog integrated circuits.
ICCAD
Cheng-Wu Lin, Chung-Lin Lee, Jai-Ming Lin, Soon-Jyh Chang
2012 J jnl
Mismatch-Aware Common-Centroid Placement for Arbitrary-Ratio Capacitor Arrays Considering Dummy Capacitors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cheng-Wu Lin, Jai-Ming Lin, Yen-Chih Chiu, Chun-Po Huang, Soon-Jyh Chang
2012 — conf
Routability-driven placement algorithm for analog integrated circuits.
ISPD
Cheng-Wu Lin, Cheng-Chung Lu, Jai-Ming Lin, Soon-Jyh Chang
2011 A* conf
Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuits.
DAC
Cheng-Wu Lin, Jai-Ming Lin, Yen-Chih Chiu, Chun-Po Huang, Soon-Jyh Chang
2010 J jnl
A 5-bit 3.2-GS/s Flash ADC With a Digital Offset Calibration Scheme.
IEEE Trans. Very Large Scale Integr. Syst.
Ying-Zu Lin, Cheng-Wu Lin, Soon-Jyh Chang
2010 A* conf
Performance-driven analog placement considering boundary constraint.
DAC
Cheng-Wu Lin, Jai-Ming Lin, Chun-Po Huang, Soon-Jyh Chang
2007 J jnl
Oscillator-Based Reconfigurable Sinusoidal Signal Generator for ADC BIST.
J. Electron. Test.
Hsin-Wen Ting, Cheng-Wu Lin, Bin-Da Liu, Soon-Jyh Chang