Chen-Yong Cher

46 papers A* 10A 10B 2C 3Misc 2Journal 13Unranked 6

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	CLEAR Cross-Layer Resilience: A Retrospective. IEEE Des. Test Eric Cheng, Hyungmin Cho, Shahrzad Mirkhani, Lukasz G. Szafaryn, Jacob A. Abraham, Pradip Bose, Chen-Yong Cher, Klas Lilja, Kevin Skadron, Mircea Stan, Subhasish Mitra
2018	J	`jnl`	Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra
2017	A*	`conf`	BRAVO: Balanced Reliability-Aware Voltage Optimization. HPCA Karthik Swaminathan, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose
2017	C	`conf`	Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. ICCD Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra
2017	J	`jnl`	System-Level Effects of Soft Errors in Uncore Components. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hyungmin Cho, Eric Cheng, Thomas Shepherd, Chen-Yong Cher, Subhasish Mitra
2017	J	`jnl`	Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). CoRR Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra
2016	J	`jnl`	CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores. CoRR Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra
2016	A*	`conf`	Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores. DAC Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra
2016	A	`conf`	Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency. ISLPED William J. Song, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose
2016	A	`conf`	Understanding error propagation in GPGPU applications. SC Guanpeng Li, Karthik Pattabiraman, Chen-Yong Cher, Pradip Bose
2015	J	`jnl`	Active Memory Cube: A processing-in-memory architecture for exascale systems. IBM J. Res. Dev. Ravi Nair, Samuel Antão, Carlo Bertolli, Pradip Bose, José R. Brunheroto, Tong Chen, Chen-Yong Cher, Carlos H. A. Costa, J. Doi, Constantinos Evangelinos, Bruce M. Fleischer, Thomas W. Fox, Diego S. Gallo, Leopold Grinberg, John A. Gunnels, Arpith C. Jacob, P. Jacob, Hans M. Jacobson, Tejas Karkhanis, C. Kim, Jaime H. Moreno, John K. O'Brien, Martin Ohmacht, Yoonho Park, Daniel A. Prener, Bryan S. Rosenburg, Kyung Dong Ryu, Olivier Sallenave, Mauricio J. Serrano, P. D. M. Siegl, Krishnan Sugavanam, Zehra Sura
2015	A	`conf`	Efficient soft error vulnerability estimation of complex designs. DATE Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham
2015	A	`conf`	Experience report: An application-specific checkpointing technique for minimizing checkpoint corruption. ISSRE Guanpeng Li, Karthik Pattabiraman, Chen-Yong Cher, Pradip Bose
2015	J	`jnl`	Understanding Soft Errors in Uncore Components. CoRR Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra
2015	A*	`conf`	Understanding soft errors in uncore components. DAC Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra
2015	A	`conf`	Understanding the propagation of transient errors in HPC applications. SC Rizwan A. Ashraf, Roberto Gioiosa, Gokcen Kestor, Ronald F. DeMara, Chen-Yong Cher, Pradip Bose
2014	A	`conf`	A System Software Approach to Proactive Memory-Error Avoidance. SC Carlos H. A. Costa, Yoonho Park, Bryan S. Rosenburg, Chen-Yong Cher, Kyung Dong Ryu
2014	A	`conf`	Cross layer resiliency in real world. DATE Vikas Chandra, Subhasish Mitra, Chen-Yong Cher, Silvia Melitta Müller
2014	—	`conf`	Soft Error Resiliency Characterization on IBM BlueGene/Q Processor. ASP-DAC Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam
2014	A	`conf`	Soft error resiliency characterization and improvement on IBM BlueGene/Q processor using accelerated proton irradiation. ITC Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam
2014	—	`conf`	The resilience wall: Cross-layer solution strategies. VLSI-DAT Subhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyungmin Cho, Rajiv V. Joshi, Young Moon Kim, Charles R. Lefurgy, Yanjing Li, Kenneth P. Rodbell, Kevin Skadron, James H. Stathis, Lukasz G. Szafaryn
2014	A	`conf`	Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection. SC Chen-Yong Cher, Meeta Sharma Gupta, Pradip Bose, K. Paul Muller
2013	J	`jnl`	Design for low power and power management in IBM Blue Gene/Q. IBM J. Res. Dev. Krishnan Sugavanam, Chen-Yong Cher, John A. Gunnels, Ruud A. Haring, Philip Heidelberger, Hans M. Jacobson, Moyra K. McManus, D. P. Paulsen, David L. Satterfield, Yutaka Sugawara, Robert Walkup
2013	Misc	`conf`	Innovative practices session 11C: Resilience. VTS Chen-Yong Cher, Mohan J. Kumar
2013	Misc	`conf`	Innovative practices session 7C: Self-calibration & trimming. VTS Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake
2013	A*	`conf`	Quantitative evaluation of soft error injection techniques for robust system design. DAC Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra
2013	J	`jnl`	SMT Malleability in IBM POWER5 and POWER6 Processors. IEEE Trans. Computers Alessandro Morari, Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero
2012	A*	`conf`	An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring. DAC Huapeng Zhou, Xin Li, Chen-Yong Cher, Eren Kursun, Haifeng Qian, Shi-Chune Yao
2011	J	`jnl`	Characterizing Power and Temperature Behavior of POWER6-Based System. IEEE J. Emerg. Sel. Topics Circuits Syst. Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose
2011	J	`jnl`	Exploring the effects of on-chip thermal variation on high-performance multicore architectures. ACM Trans. Archit. Code Optim. Chen-Yong Cher, Eren Kursun
2010	—	`conf`	A wire-speed power ISSCC Charles L. Johnson, David H. Allen, Jeffrey D. Brown, Steve Vanderwiel, Russ Hoover, Heather D. Achilles, Chen-Yong Cher, George A. May, Hubertus Franke, Jimi Xenidis, Claude Basso
2010	—	`conf`	Performance and power evaluation of an in-line accelerator. Conf. Computing Frontiers Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose
2010	B	`conf`	Power and thermal characterization of POWER6 system. PACT Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose
2010	—	`conf`	Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban
2010	C	`conf`	Trends and techniques for energy efficient architectures. VLSI-SoC Víctor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero
2009	J	`jnl`	Temperature Variation Characterization and Thermal Management of Multicore Architectures. IEEE Micro Eren Kursun, Chen-Yong Cher
2008	B	`conf`	Cell GC: using the cell synergistic processor as a garbage collection coprocessor. VEE Chen-Yong Cher, Michael Gschwind
2008	A*	`conf`	Software-Controlled Priority Characterization of POWER5 Processor. ISCA Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero
2008	C	`conf`	Variation-aware thermal characterization and management of multi-core architectures. ICCD Eren Kursun, Chen-Yong Cher
2007	A	`conf`	Thermal-aware task scheduling at the system software level. ISLPED Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose
2006	A*	`conf`	An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. MICRO Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi
2006	—	`conf`	Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?. ARCS Chen-Yong Cher, Il Park, T. N. Vijaykumar
2005	J	`jnl`	Combined circuit and architectural level variable supply-voltage scaling for low power. IEEE Trans. Very Large Scale Integr. Syst. Hai Li, Chen-Yong Cher, Kaushik Roy, T. N. Vijaykumar
2004	A*	`conf`	Software prefetching for mark-sweep garbage collection: hardware analysis and software redesign. ASPLOS Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykumar
2003	A*	`conf`	VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power. MICRO Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy
2001	A*	`conf`	Skipper: a microarchitecture for exploiting control-flow independence. MICRO Chen-Yong Cher, T. N. Vijaykumar