Chen-Shang Lin

13 papers A* 3A 4Journal 4Unranked 2
YearRankTypeTitle / Venue / Authors
1997 J jnl
Synthesis of Hazard-Free Asynchronous Circuits Based on Characteristic Graph.
IEEE Trans. Computers
Kuan-Jen Lin, Chi-Wen Kuo, Chen-Shang Lin
1996 J jnl
Parallel sequence fault simulation for synchronous sequential circuits.
J. Electron. Test.
Chen-Pin Kung, Chen-Shang Lin
1995 — conf
Fast fault simulation for BIST applications.
Asian Test Symposium
Chen-Pin Kung, Chun-Jieh Huang, Chen-Shang Lin
1995 J jnl
Test set compaction for combinational circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jau-Shien Chang, Chen-Shang Lin
1994 A conf
A Test-Clock Reduction Method for Scan-Designed Circuits.
ITC
Jau-Shien Chang, Chen-Shang Lin
1994 — conf
Direct Synthesis of Hazard-Free Asynchronous Circuits from STGs Based on Lock Relation and BG-Decomposition Approach.
EDAC-ETC-EUROASIC
Kuan-Jen Lin, Jih-Wen Kuo, Chen-Shang Lin
1994 A conf
HyHOPE: a fast fault simulator with efficient simulation of hypertrophic faults.
ICCAD
Chen-Pin Kung, Chen-Shang Lin
1992 J jnl
On the OBDD-Representation of General Boolean Functions.
IEEE Trans. Computers
Heh-Tyan Liaw, Chen-Shang Lin
1992 A conf
On the verification of state-coding in STGs.
ICCAD
Kuan-Jen Lin, Chen-Shang Lin
1991 A* conf
Automatic Synthesis of Asynchronous Circuits.
DAC
Kuan-Jen Lin, Chen-Shang Lin
1990 A conf
Efficient Automatic Diagnosis of Digital Circuits.
ICCAD
Heh-Tyan Liaw, Jia-Horng Tsaih, Chen-Shang Lin
1989 A* conf
VVDS: A Verification/Diagnosis System for VHDL.
DAC
Heh-Tyan Liaw, K.-T. Tran, Chen-Shang Lin
1988 A* conf
Automatic Functional Test Program Generation for Microprocessors.
DAC
Chen-Shang Lin, Hong-Fa Ho