Che-Wei Chou

19 papers A 1B 1Journal 11Unranked 6
YearRankTypeTitle / Venue / Authors
2026 J jnl
A transformer-based sequential analysis methodology for trajectory tracking at safety surveillance in manufacturing.
Appl. Soft Comput.
Hwai-Jung Hsu, Che-Wei Chou, Guo-Lun Gao
2026 J jnl
Auto-seg: An automated G-code interpreter and 1DCNN-based framework for signal segmentation and synchronization in CNC machining.
Appl. Soft Comput.
Che-Wei Chou, Hwai-Jung Hsu, Kai-Chun Huang, Yu-Chieh Chen
2026 J jnl
Integrating genetic algorithm and simulation for stochastic flow shop scheduling with delivery risk in System-in-Package assembly.
Comput. Ind. Eng.
Kang-Ting Ma, Che-Wei Chou, Wei-Cheng Chiu, Ren-Hong Luo
2025 J jnl
Multiagent reinforcement learning-based dispatching model for overhead hoist transfer in automated material handling system.
Comput. Ind. Eng.
Che-Wei Chou, Wei-Cheng Chiu, Yu-Teng Hsu
2025 J jnl
Robust real-time object detection and counting system for casting foundries.
Appl. Soft Comput.
Che-Wei Chou, Yu-Teng Hsu
2024 J jnl
DeepMachining: Online Prediction of Machining Errors of Lathe Machines.
CoRR
Xiang-Li Lu, Hwai-Jung Hsu, Che-Wei Chou, H. T. Kung, Chen-Hsin Lee, Sheng-Mao Cheng
2017 J jnl
An empirical study of bio manufacturing for the scheduling of hepatitis in vitro diagnostic device with constrained process time window.
Comput. Ind. Eng.
Hung-Kai Wang, Chen-Fu Chien, Che-Wei Chou
2017 — conf
Autonomous Deployment of UAVs as Access Points to Serve Wireless Terminals.
VTC Fall
Che-Wei Chou, Li-Hsing Yen
2016 J jnl
A Novel Route Selection and Resource Allocation Approach to Improve the Efficiency of Manual Material Handling System in 200-mm Wafer Fabs for Industry 3.5.
IEEE Trans Autom. Sci. Eng.
Chen-Fu Chien, Che-Wei Chou, Hui-Chun Yu
2015 J jnl
Hierarchical Test Integration Methodology for 3-D ICs.
IEEE Des. Test
Che-Wei Chou, Jin-Fu Li, Yun-Chao Yu, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou
2015 — conf
Testing Inter-Word Coupling Faults of Wide I/O DRAMs.
ATS
Che-Wei Chou, Yong-Xiao Chen, Jin-Fu Li
2014 J jnl
A Multiobjective Hybrid Genetic Algorithm for TFT-LCD Module Assembly Scheduling.
IEEE Trans Autom. Sci. Eng.
Che-Wei Chou, Chen-Fu Chien, Mitsuo Gen
2013 J jnl
A Built-In Self-Repair Scheme for 3-D RAMs With Interdie Redundancy.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Che-Wei Chou, Yu-Jen Huang, Jin-Fu Li
2013 — conf
A TSV Repair Scheme Using Enhanced Test Access Architecture for 3-D ICs.
Asian Test Symposium
Chi-Chun Yang, Che-Wei Chou, Jin-Fu Li
2012 A conf
A built-in self-test scheme for 3D RAMs.
ITC
Yun-Chao You, Che-Wei Chou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
2012 — conf
Post-bond test techniques for TSVs with crosstalk faults in 3D ICs.
VLSI-DAT
Yu-Jen Huang, Jin-Fu Li, Che-Wei Chou
2010 — conf
A Test Integration Methodology for 3D Integrated Circuits.
Asian Test Symposium
Che-Wei Chou, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
2010 B conf
A low-cost built-in self-test scheme for an array of memories.
ETS
Yu-Jen Huang, Che-Wei Chou, Jin-Fu Li
2010 — conf
Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs.
DELTA
Chih-Sheng Hou, Jin-Fu Li, Che-Wei Chou