Charles R. Moore

21 papers A* 3A 1C 4Journal 11Unranked 2
YearRankTypeTitle / Venue / Authors
2012 C conf
Exploiting microarchitectural redundancy for defect tolerance.
ICCD
Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2011 J jnl
Power efficiency as the #1 design constraint: technical perspective.
Commun. ACM
Charles R. Moore
2008 A* conf
Microarchitecture in the system-level integration era.
MICRO
Charles R. Moore
2004 J jnl
Managing the Transition from Complexity to Elegance: Design Convergence.
IEEE Micro
Charles R. Moore
2004 J jnl
Scalable Hardware Memory Disambiguation for High-ILP Processors.
IEEE Micro
Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
2004 J jnl
Scaling to the End of Silicon with EDGE Architectures.
Computer
Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode
2004 J jnl
TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP.
ACM Trans. Archit. Code Optim.
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore
2003 A* conf
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture.
ISCA
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
2003 J jnl
Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture.
IEEE Micro
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
2003 C conf
Exploiting Microarchitectural Redundancy For Defect Tolerance.
ICCD
Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003 J jnl
Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences.
IEEE Micro
Charles R. Moore, Kevin W. Rudd, Ruby B. Lee, Pradip Bose
2003 J jnl
Managing the Transition from Complexity to Elegance: Knowing When You Have a Problem.
IEEE Micro
Charles R. Moore
2003 A conf
Microprocessor pipeline energy analysis.
ISLPED
Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003 A* conf
Scalable Hardware Memory Disambiguation for High ILP Processors.
MICRO
Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
1994 J jnl
Design considerations for the PowerPC 601 microprocessor.
IBM J. Res. Dev.
Michael T. Vaden, Lawrence J. Merkel, Charles R. Moore, Terence M. Potter, Robert James Reese
1994 J jnl
The PowerPC Alliance.
Commun. ACM
Charles R. Moore, Russell C. Stanphill
1993 J jnl
The Power PC 601 microprocessor.
IEEE Micro
Michael C. Becker, Michael S. Allen, Charles R. Moore, John S. Muhich, David P. Tuttle
1992 C conf
IBM Single Chip RISC Processor (RSC).
ICCD
Charles R. Moore, D. M. Balser, John S. Muhich, R. E. East
1990 — conf
IBM second-generation RISC machine organization.
Compcon
H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan
1989 C conf
IBM second-generation RISC machine organization.
ICCD
H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan
1974 — conf
Character string manipulation in APL.
APL
Charles R. Moore