Charles E. Stroud

64 papers A* 2A 22B 1C 2Misc 9Journal 17Unranked 10

Year	Rank	Type	Title / Venue / Authors
2011	J	`jnl`	Selective Spectrum Analysis for Analog Measurements. IEEE Trans. Ind. Electron. Jie Qin, Joseph Cali, Bradley F. Dutton, George J. Starr, Fa Foster Dai, Charles E. Stroud
2010	J	`jnl`	On-Line Single Event Upset Detection and Correction in Field Programmable Gate Array Configuration Memories. Int. J. Comput. Their Appl. Bradley F. Dutton, Charles E. Stroud
2010	A	`conf`	The First Clock Cycle Is A Real BIST. ESA Charles E. Stroud, Bradley F. Dutton
2009	A	`conf`	Application of Embedded Systems in Low Earth Orbit for Measurement of Ionospheric Anomalies. ESA George J. Starr, J. M. Wersinger, Richard Chapman, Lloyd Riggs, Victor P. Nelson, John Klingelhoeffer, Charles E. Stroud
2009	—	`conf`	Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. DFT George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, Foster F. Dai, Victor P. Nelson
2009	A	`conf`	Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs. ESA Bradley F. Dutton, Charles E. Stroud
2009	Misc	`conf`	Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays. CATA Brooks R. Garrison, Daniel T. Milton, Charles E. Stroud
2009	A	`conf`	Embedded Processor Based Fault Injection and SEU Emulation for FPGAs. ESA Bradley F. Dutton, Mustafa Ali, Charles E. Stroud, John Sunwoo
2009	J	`jnl`	On Built-In Self-Test for Adders. J. Electron. Test. Mary D. Pulukuri, Charles E. Stroud
2009	Misc	`conf`	Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs. CATA Bradley F. Dutton, Charles E. Stroud
2009	—	`conf`	Soft Core Embedded Processor Based Built-In Self-Test of FPGAs. DFT Bradley F. Dutton, Charles E. Stroud
2008	—	`ch.`	Logic Testing. Wiley Encyclopedia of Computer Science and Engineering Laung-Terng Wang, Charles E. Stroud, Kwang-Ting (Tim) Cheng
2007	J	`jnl`	FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems. IEEE Trans. Ind. Electron. Jie Qin, Charles E. Stroud, Fa Foster Dai
2007	C	`conf`	Noise Figure Measurement Using Mixed-Signal BIST. ISCAS Jie Qin, Charles E. Stroud, Foster F. Dai
2007	J	`jnl`	Online Fault Tolerance for FPGA Logic Blocks. IEEE Trans. Very Large Scale Integr. Syst. John Marty Emmert, Charles E. Stroud, Miron Abramovici
2006	A	`conf`	An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs. ESA Lee Lerner, Charles E. Stroud
2006	J	`jnl`	An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. J. Electron. Test. Jack R. Smith, Tian Xia, Charles E. Stroud
2006	C	`conf`	Analog frequency response measurement in mixed-signal systems. ISCAS Charles E. Stroud, Dayu Yang, Foster F. Dai
2006	J	`jnl`	Automatic linearity and frequency response tests with built-in pattern generator and analyzer. IEEE Trans. Very Large Scale Integr. Syst. Foster F. Dai, Charles E. Stroud, Dayu Yang
2006	A	`conf`	Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs. ESA Daniel T. Milton, Sachin Dhingra, Charles E. Stroud
2005	A	`conf`	Built-In Self-Test and Diagnosis of Multiple Embedded Cores in SoCs. ESA Srinivas M. Garimella, Charles E. Stroud
2005	—	`conf`	Built-in self-test for automatic analog frequency response measurement. ISCAS (3) Dayu Yang, Foster F. Dai, Charles E. Stroud
2005	Misc	`conf`	On-Chip BIST-Based Diagnosis of Embedded Programmable Logic Cores in System-on-Chip Devices. CATA Charles E. Stroud, Srinivas M. Garimella, John Sunwoo
2004	A	`conf`	Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. ITC Foster F. Dai, Charles E. Stroud, Dayu Yang, Shuying Qi
2004	A	`conf`	Built-In Self-Test for System-on-Chip: A Case Study. ITC Charles E. Stroud, John Sunwoo, Srinivas M. Garimella, Jonathan Harris
2004	J	`jnl`	Online BIST and BIST-based diagnosis of FPGA logic blocks. IEEE Trans. Very Large Scale Integr. Syst. Miron Abramovici, Charles E. Stroud, John Marty Emmert
2003	A	`conf`	BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study. ITC Charles E. Stroud, Keshia N. Leach, Thomas A. Slaughter
2003	J	`jnl`	BIST-Based Delay-Fault Testing in FPGAs. J. Electron. Test. Miron Abramovici, Charles E. Stroud
2002	—	`conf`	BIST-Based Delay-Fault Testing in FPGAs. IOLTW Miron Abramovici, Charles E. Stroud
2002	A	`conf`	BIST-Based Diagnosis of FPGA Interconnect. ITC Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici
2002	A*	`conf`	Using embedded FPGAs for SoC yield improvement. DAC Miron Abramovici, Charles E. Stroud, John Marty Emmert
2001	Misc	`conf`	Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them? VTS Henry Chang, Steve Dollens, Gordon W. Roberts, Charles E. Stroud, Mani Soma, Jacob A. Abraham
2001	J	`jnl`	BIST-based test and diagnosis of FPGA logic blocks. IEEE Trans. Very Large Scale Integr. Syst. Miron Abramovici, Charles E. Stroud
2001	—	`conf`	On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs. IOLTW Miron Abramovici, Charles E. Stroud, Matthew Lashinsky, Jeremy Nall, John Marty Emmert
2001	—	`conf`	On-Line Fault Tolerance for FPGA Interconnect with Roving STARs. DFT John Marty Emmert, Stanley Baumgart, Pankaj Kataria, Andrew M. Taylor, Charles E. Stroud, Miron Abramovici
2001	—	`conf`	Roving Stars: An Integrated Approach To On-Line Testing, Diagnosis, And Fault Tolerance For Fpgas In Adaptive Computing Systems. Evolvable Hardware Miron Abramovici, John Marty Emmert, Charles E. Stroud
2000	J	`jnl`	A New Method for Testing Re-Programmable PLAs. J. Electron. Test. Charles E. Stroud, James R. Bailey, Johan R. Emmert
2000	A	`conf`	Bridging fault extraction from physical design data for manufacturing test development. ITC Charles E. Stroud, John Marty Emmert, John R. Bailey, Khushru S. Chhor, Dragan Nikolic
2000	A	`conf`	DIST-based detection and diagnosis of multiple faults in FPGAs. ITC Miron Abramovici, Charles E. Stroud
2000	Misc	`conf`	Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration. FCCM John Marty Emmert, Charles E. Stroud, Brandon Skaggs, Miron Abramovici
2000	—	`conf`	Improving On-Line BIST-Based Diagnosis for Roving STARs. IOLTW Miron Abramovici, Charles E. Stroud, Brandon Skaggs, John Marty Emmert
2000	B	`conf`	Performance Penalty for Fault Tolerance in Roving STARs. FPL John Marty Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici
1999	Misc	`conf`	Enhanced Bist-Based Diagnosis of FPGAs via Boundary Scan Access. VTS Carter Hamilton, Gretchen Gibson, Sajitha Wijesuriya, Charles E. Stroud
1999	A	`conf`	Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications. ITC Miron Abramovici, Charles E. Stroud, Carter Hamilton, Sajitha Wijesuriya, Vinay Verma
1998	Misc	`conf`	Applying Built-In Self-Test to Majority Voting Fault Tolerant Circuits. VTS Charles E. Stroud, Joe K. Tannehill Jr.
1998	A	`conf`	Built-in self-test of FPGA interconnect. ITC Charles E. Stroud, Sajitha Wijesuriya, Carter Hamilton, Miron Abramovici
1997	A	`conf`	A Parameterized VHDL Library for On-Line Testing. ITC Charles E. Stroud, M. Ding, S. Seshadri, Ramesh Karri, I. Kim, Subhajit Roy, S. Wu
1997	A	`conf`	BIST-Based Diagnostics of FPGA Logic Blocks. ITC Charles E. Stroud, Eric Lee, Miron Abramovici
1996	Misc	`conf`	Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!). VTS Charles E. Stroud, Srinivasa Konala, Ping Chen, Miron Abramovici
1996	A	`conf`	Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. FPGA Charles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici
1996	A	`conf`	Using ILA Testing for BIST in FPGAs. ITC Charles E. Stroud, Eric Lee, Srinivasa Konala, Miron Abramovici
1995	—	`conf`	A built-in self test scheme for VLSI. ASP-DAC T. Raju Damarla, Wei Su, Gerald T. Michael, Moon J. Chung, Charles E. Stroud
1995	Misc	`conf`	Improving the efficiency of error identification via signature analysis. VTS Charles E. Stroud, T. Raju Damarla
1995	J	`jnl`	Multiple error detection and identification via signature analysis. J. Electron. Test. T. Raju Damarla, Charles E. Stroud, Avinash Sathaye
1994	J	`jnl`	Reliability of majority voting based VLSI fault-tolerant circuits. IEEE Trans. Very Large Scale Integr. Syst. Charles E. Stroud
1993	J	`jnl`	Testability and test generation for majority voting fault-tolerant circuits. J. Electron. Test. Charles E. Stroud, Ahmed E. Barbour
1991	A	`conf`	Built-In Self-Test for High-Speed Data-Path Circuitry. ITC Charles E. Stroud
1991	A	`conf`	Distractions in Design for Testability and Built-Is Self-Test. ITC Charles E. Stroud
1990	—	`conf`	Parallel Processing and Hardware Acceleration for Synthesis of VLSI Devices from Behavioral Models. ICPP (1) Charles E. Stroud, Ahmed E. Barbour
1989	A	`conf`	Design for Testability and Test Generation for Static Redundancy System Level Fault-Tolerant Circuits. ITC Charles E. Stroud, Ahmed E. Barbour
1988	A*	`conf`	An Automated BIST Approach for General Sequential Logic Synthesis. DAC Charles E. Stroud
1988	J	`jnl`	Automated BIST for sequential logic synthesis. IEEE Des. Test Charles E. Stroud
1988	J	`jnl`	Behavioral model synthesis with Cones. IEEE Des. Test Charles E. Stroud, Ronald R. Munoz, David A. Pierce
1986	J	`jnl`	Built-in Self Testing of Embedded Memories. IEEE Des. Test Sunil K. Jain, Charles E. Stroud