Chang Woo Kang

11 papers A 1Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2007 J jnl
A Synthesis Approach for Coarse-Grained Antifuse-Based FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chang Woo Kang, Ali Iranli, Massoud Pedram
2006 — conf
Gate Sizing and Replication to Minimize the Effects of Virtual Ground Parasitic Resistances in MTCMOS Designs.
ISQED
Chanseok Hwang, Chang Woo Kang, Massoud Pedram
2006 — conf
Low-power clustering with minimum logic replication for coarse-grained, antifuse based FPGAs.
ACM Great Lakes Symposium on VLSI
Chang Woo Kang, Massoud Pedram
2005 J jnl
A Leakage-aware Low Power Technology Mapping Algorithm Considering the Hot-Carrier Effect.
J. Low Power Electron.
Chang Woo Kang, Massoud Pedram
2005 J jnl
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System.
J. VLSI Signal Process.
Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca
2005 — conf
Clustering techniques for coarse-grained, antifuse FPGAs.
ASP-DAC
Chang Woo Kang, Massoud Pedram
2004 — conf
Technology mapping and packing for coarse-grained, anti-fuse based FPGAs.
ASP-DAC
Chang Woo Kang, Ali Iranli, Massoud Pedram
2003 — conf
Buffer sizing for minimum energy-delay product by using an approximating polynomial.
ACM Great Lakes Symposium on VLSI
Chang Woo Kang, Soroush Abbaspour, Massoud Pedram
2003 — conf
Technology mapping for low leakage power and high speed with hot-carrier effect consideration.
ASP-DAC
Chang Woo Kang, Massoud Pedram
2002 — conf
Technology Mapping for Low Leakage Power with Hot-Carrier Effect Consideration.
IWLS
Chang Woo Kang, Massoud Pedram
2002 A conf
The architecture of the DIVA processing-in-memory chip.
ICS
Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan