Chang-Tzu Lin

22 papers A 1C 4Journal 2Unranked 15
YearRankTypeTitle / Venue / Authors
2024 — conf
Practical Self-Supervised Model for Continual Learning.
ICCE-Taiwan
Wen-Hwa Liao, Chang-Tzu Lin, Ssu-Chi Kuai
2021 — conf
Learning Based Placement Refinement to Reduce DRC Short Violations.
VLSI-DAT
Ying-Yao Huang, Chang-Tzu Lin, Wei-Lun Liang, Hung-Ming Chen
2019 C conf
More Effective Power Network Prototyping by Analytical and Centroid Learning.
ISCAS
Yu-Hsiang Chuang, Chang-Tzu Lin, Hung-Ming Chen, Chi-Han Lee, Ting-Sheng Chen
2017 — conf
Heterogeneous chip power delivery modeling and co-synthesis for practical 3DIC realization.
ASP-DAC
Wei-Hsun Liao, Chang-Tzu Lin, Sheng-Hsin Fang, Chien-Chia Huang, Hung-Ming Chen, Ding-Ming Kwai, Yung-Fa Chou
2017 — conf
On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D IC.
ISVLSI
Sheng-Hsin Fang, Chang-Tzu Lin, Wei-Hsun Liao, Chien-Chia Huang, Li-Chin Chen, Hung-Ming Chen, I-Hsuan Lee, Ding-Ming Kwai, Yung-Fa Chou
2016 — conf
A New Methodology for Noise Sensor Placement Based on Association Rule Mining.
ACM Great Lakes Symposium on VLSI
Yu-Hsiang Hung, Sheng-Hsin Fang, Hung-Ming Chen, Shen-Min Chen, Chang-Tzu Lin, Chia-Hsin Lee
2014 — conf
A power delivery network (PDN) engineering change order (ECO) approach for repairing IR-drop failures after the routing stage.
VLSI-DAT
Tsu-Wei Tseng, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai
2014 C conf
Improving power delivery network design by practical methodologies.
ICCD
Chia-Chi Huang, Chang-Tzu Lin, Wei-Syun Liao, Chieh-Jui Lee, Hung-Ming Chen, Chia-Hsin Lee, Ding-Ming Kwai
2013 A conf
Effective power network prototyping via statistical-based clustering and sequential linear programming.
DATE
Shih-Ying Sean Liu, Chieh-Jui Lee, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee
2013 — conf
Enabling inter-die co-optimization in 3-D IC with TSVs.
VLSI-DAT
Chang-Tzu Lin, Tsu-Wei Tseng, Yung-Fa Chou, Chia-Hsin Lee, Ding-Ming Kwai
2013 — conf
I-LUTSim: An iterative look-up table based thermal simulator for 3-D ICs.
ASP-DAC
Chi-Wen Pan, Yu-Min Lee, Pei-Yu Huang, Chi-Ping Yang, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai
2012 — conf
3-D centric technology and realization with TSV.
VLSI-DAT
Chang-Tzu Lin, Chia-Hsin Lee, Tsu-Wei Tseng, Ding-Ming Kwai, Yung-Fa Chou
2012 — conf
Hierarchical power network synthesis for multiple power domain designs.
ISQED
Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee
2011 — conf
3D Stacked IC layout considering bond pad density and doubling for manufacturing yield improvement.
ISQED
Ding-Ming Kwai, Chang-Tzu Lin
2010 — conf
CAD reference flow for 3D via-last integrated circuits.
ASP-DAC
Chang-Tzu Lin, Ding-Ming Kwai, Yung-Fa Chou, Ting-Sheng Chen, Wen Ching Wu
2007 J jnl
Fixed-outline floorplanning using robust evolutionary search.
Eng. Appl. Artif. Intell.
De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang, Ching-Hwa Cheng
2007 C conf
Noise-Aware Floorplanning for Fast Power Supply Network Design.
ISCAS
Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang, Ching-Hwa Cheng
2006 J jnl
Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm.
J. Circuits Syst. Comput.
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2005 — conf
Modem floorplanning with abutment and fixed-outline constraints.
ISCAS (6)
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang, Hsin-Hsien Ho
2004 — conf
Robust fixed-outline floorplanning through evolutionary search.
ASP-DAC
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2003 — conf
Non-slicing floorplans with boundary constraints using generalized polish expression.
ASP-DAC
De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang
2002 C conf
GPE: A New Representation for VLSI Floorplan Problem.
ICCD
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang