Chandrajit Pal

30 papers C 2Misc 3Journal 14Unranked 11

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	EdgeNet: Empowering Edge Device Performance by Leveraging Clustered Networks for Optimal Memory Management With Platform-Awareness. IEEE Trans. Emerg. Top. Comput. Intell. Pratibha Verma, Chandrajit Pal, Pradip Sasmal, K. Z. Najiya, Amit Acharyya
2025	J	`jnl`	APPARENT: AI-Powered Platform Anomaly Detection in Edge Computing. IEEE Trans. Sustain. Comput. Chandrajit Pal, Sangeet Saha, Xiaojun Zhai, Gareth Howells, Klaus D. McDonald-Maier
2025	J	`jnl`	RENOWNED: A Real-Time Anomaly Detection and Mitigation Framework in Edge-Enabled IoV. IEEE Internet Things J. Chandrajit Pal, Sangeet Saha, Xiaojun Zhai, Klaus D. McDonald-Maier
2024	J	`jnl`	Cocoa-Net: Performance Analysis on Classification of Cocoa Beans Using Structural Image Feature. Informatica (Slovenia) Chandrajit Pal, Samikshan Das, Amitava Akuli, Sudip Kumar Adhikari, Aniruddha Dey
2024	J	`jnl`	Fast, Scalable, Energy-Efficient Non-element-wise Matrix Multiplication on FPGA. CoRR Xuqi Zhu, Huaizhi Zhang, JunKyu Lee, Jiacheng Zhu, Chandrajit Pal, Sangeet Saha, Klaus D. McDonald-Maier, Xiaojun Zhai
2024	—	`conf`	NIRVANA: Non-Invasive Real-Time VulnerAbility ANAlysis for RISC-V Processor. COINS Jiacheng Zhu, Xuqi Zhu, Michal Borowski, Huaizhi Zhang, Chandrajit Pal, Sangeet Saha, Dongbing Gu, Klaus D. McDonald-Maier, Xiaojun Zhai
2024	—	`conf`	REALITY: RL-PowEred AnomaLy Detection with Imprecise Computing in MulTi-Core SYstems. COINS Chandrajit Pal, Sangeet Saha, Xiaojun Zhai, Klaus D. McDonald-Maier
2023	—	`conf`	Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-design. NEWCAS Michal Borowski, Chandrajit Pal, Sangeet Saha, Ludovico Poli, Xiaojun Zhai, Klaus D. McDonald-Maier
2023	—	`conf`	Power and Memory Efficient High-Speed RL Based Run time Power Manager for Edge Computation. MWSCAS Ratnala Vinay, Kartik Laad, Chandrajit Pal, Pradip Sasmal, Toshihisa Haraki, Chirag Juyal, Mohamed Amir Gabir Elbakri, Amit Acharyya
2023	—	`conf`	SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge. NEWCAS Chandrajit Pal, Pratibha Verma, Himanshu Rohit, Dubacharla Gyaneshwar, Sumohana S. Channappayya, Amit Acharyya
2022	J	`jnl`	A Novel Approach in WiFi CSI-Based Fall Detection. SN Comput. Sci. Govardhan Mattela, Manmohan Tripathi, Chandrajit Pal
2022	—	`conf`	Clustered Network Adaptation Methodology for the Resource Constrained Platform. NEWCAS Pratibha Verma, Pradip Sasmal, Chandrajit Pal, Sumohana S. Channappayya, Amit Acharyya
2022	J	`jnl`	Fragmented Huffman-Based Compression Methodology for CNN Targeting Resource-Constrained Edge Devices. Circuits Syst. Signal Process. Chandrajit Pal, Sunil Pankaj, Wasim Akram, Dwaipayan Biswas, Govardhan Mattela, Amit Acharyya
2022	—	`conf`	Light Weight RL Based Run Time Power Management Methodology for Edge Devices. ICECS 2022 Ratnala Vinay, Pradip Sasmal, Chandrajit Pal, Toshihisa Haraki, Kazuhiro Tamura, Chirag Juyal, Mohamed Amir Gabir Elbakri, Sumohana S. Channappayya, Amit Acharyya
2022	—	`conf`	SqueezeVGGNet: A Methodology for designing low complexity VGG Architecture for Resource Constraint Edge Applications. NEWCAS Ramesh Reddy Chandrapu, Chandrajit Pal, Anagha Nimbekar, Amit Acharyya
2021	Misc	`conf`	A novel deep neural design and efficient Pipeline architecture for Person Re-Identification in high resolution Video. COMSNETS Govardhan Mattela, Manmohan Tripathi, Chandrajit Pal
2021	J	`jnl`	Deep neural network for automated simultaneous intervertebral disc (IVDs) identification and segmentation of multi-modal MR images. Comput. Methods Programs Biomed. Pabitra Das, Chandrajit Pal, Amit Acharyya, Amlan Chakrabarti, Saumyajit Basu
2020	J	`jnl`	Adaptive denoising of 3D volumetric MR images using local variance based estimator. Biomed. Signal Process. Control. Pabitra Das, Chandrajit Pal, Amlan Chakrabarti, Amit Acharyya, Saumyajit Basu
2020	Misc	`conf`	An Efficient Pipeline for Distant Person Detection and Identification in 4K Video using GPUs. COMSNETS Govardhan Mattela, Manmohan Tripathi, Chandrajit Pal, Rampelli Sai Dhiraj, Amit Acharyya
2019	Misc	`conf`	Enterprise Class Deep Neural Network Architecture for recognizing objects and faces for surveillance systems. COMSNETS Govardhan Mattela, Chandrajit Pal, Manmohan Tripathi, Rohit Gavval, Amit Acharyya
2018	C	`conf`	Modified Huffman based compression methodology for Deep Neural Network Implementation on Resource Constrained Mobile Platforms. ISCAS Chandrajit Pal, Sunil Pankaj, Wasim Akram, Amit Acharyya, Dwaipayan Biswas
2017	C	`conf`	Architecture for complex network measures of brain connectivity. ISCAS Chandrajit Pal, Dwaipayan Biswas, Koushik Maharatna, Amlan Chakrabarti
2017	J	`jnl`	Rician noise removal in magnitude MRI images using efficient anisotropic diffusion filtering. Int. J. Imaging Syst. Technol. Chandrajit Pal, Pabitra Das, Amlan Chakrabarti, Ranjan Ghosh
2016	J	`jnl`	An Efficient FPGA Implementation of Optimized Anisotropic Diffusion Filtering of Images. Int. J. Reconfigurable Comput. Chandrajit Pal, Avik Kotal, Asit Samanta, Amlan Chakrabarti, Ranjan Ghosh
2015	J	`jnl`	A Brief Survey of Recent Edge-Preserving Smoothing Algorithms on Digital Images. CoRR Chandrajit Pal, Amlan Chakrabarti, Ranjan Ghosh
2015	—	`conf`	An efficient hardware design of SIFT algorithm using fault tolerant reversible logic. ReTIS Chandrajit Pal, Pabitra Das, Sudhindu Bikash Mandal, Amlan Chakrabarti, Samik Basu, Ranjan Ghosh
2014	—	`conf`	Audio de-noising by spectral subtraction technique implemented on reconfigurable hardware. IC3 Tanmay Biswas, Chandrajit Pal, Sudhindu Bikash Mandal, Amlan Chakrabarti
2014	J	`jnl`	Design space exploration for image processing architectures on FPGA targets. CoRR Chandrajit Pal, Avik Kotal, Asit Samanta, Amlan Chakrabarti, Ranjan Ghosh
2012	J	`jnl`	A brief experience on journey through hardware developments for image processing and its applications on Cryptography CoRR Sangeet Saha, Chandrajit Pal, Rourab Paul, Satyabrata Maity, Suman Sau
2011	—	`conf`	Design and implementation of real time secured RS232 link for multiple FPGA communication. ICCCS Suman Sau, Chandrajit Pal, Amlan Chakrabarti