Chandra Shekhar

30 papers Misc 10Journal 13Unranked 7

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A Three-Stage Dynamic Comparator for SAR ADC Optimized for Reduced Kickback Noise and Ultra-Low Delay. J. Circuits Syst. Comput. Buddhi Prakash Sharma, Rajeev Rajagopal, Ranjeeth Sekhar, Anu Gupta, Chandra Shekhar
2022	J	`jnl`	Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis. Wirel. Pers. Commun. Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2021	J	`jnl`	High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications. Comput. Intell. Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2021	J	`jnl`	Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications. Circuits Syst. Signal Process. Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2021	J	`jnl`	Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm. Microprocess. Microsystems Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2020	J	`jnl`	High-Level synthesis assisted design and verification framework for automotive radar processors. Microprocess. Microsystems Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2020	J	`jnl`	Speed optimal FPGA implementation of the encryption algorithms for telecom applications. Microprocess. Microsystems Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
2019	J	`jnl`	A New XOR-FREE Approach to Implement Walsh Sequences. Wirel. Pers. Commun. Gaurav Purohit, Divya Vyas, Vinod Kumar Chaubey, Kota Solomon Raju, Chandra Shekhar
2017	J	`jnl`	Memory Efficient VLSI Implementation of Real-Time Motion Detection System Using FPGA Platform. J. Imaging Sanjay Singh, Atanendu Sekhar Mandal, Chandra Shekhar, Anil Vohra
2017	J	`jnl`	Real-Time FPGA-Based Object Tracker with Automatic Pan-Tilt Features for Smart Video Surveillance Systems. J. Imaging Sanjay Singh, Chandra Shekhar, Anil Vohra
2015	Misc	`conf`	An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications. VLSID Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2015	—	`conf`	An embedded framework for accurate object localization using center of gravity measure with mean shift procedure. VDAT Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2014	Misc	`conf`	A Novel Architecture for FPGA Implementation of Otsu's Global Automatic Image Thresholding Algorithm. VLSID Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2014	—	`conf`	Automatic real-time extraction of focused regions in a live video stream using edge width information. VDAT Sanjay Singh, Sumeet Saurav, Ravi Saini, Anil K. Saini, Chandra Shekhar, Anil Vohra
2014	—	`conf`	FPGA-based real-time object tracker using modified particle filtering and SAD computation. VDAT Sanjay Singh, Ravi Saini, Sumeet Saurav, Anil K. Saini, Chandra Shekhar, Anil Vohra
2011	—	`conf`	Synthesis of Analog IC Building Blocks. ISVLSI Alpana Agarwal, Chandra Shekhar
2010	J	`jnl`	A Novel Redundant Binary Number to Natural Binary Number Converter. J. Signal Process. Syst. Subhendu Kumar Sahoo, Anu Gupta, Abhijit R. Asati, Chandra Shekhar
2010	—	`conf`	Moving Object Tracking Using Object Segmentation. ICT Sanjay Singh, Srinivasa Murali Dunga, Atanendu S. Mandal, Chandra Shekhar, Anil Vohra
2009	J	`jnl`	Dual channel addition based FFT processor architecture for signal and image processing. Int. J. High Perform. Syst. Archit. Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta
2009	—	`conf`	Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load. ICETET Abhijit R. Asati, Subhendu Kumar Sahoo, Chandra Shekhar
2008	—	`conf`	A High-Speed Radix-64 Parallel Multiplier Using a Novel Hardware Implementation Approach for Partial Product Generation Based on Redundant Binary Arithmetic. ICETET Subhendu Kumar Sahoo, Abhijit Ashati, Rasmita Sahoo, Chandra Shekhar
2008	J	`jnl`	Figure-of-Merit-Based Area-Constrained Design of Differential Amplifiers. VLSI Design Alpana Agarwal, Chandra Shekhar
2005	Misc	`conf`	Evaluation of Device Parameters of HfO2/SiO2/Si Gate Dielectric Stack for MOSFETs. VLSI Design A. Madan, S. C. Bose, P. J. George, Chandra Shekhar
2004	Misc	`conf`	Application Specific Instruction Set Processors: Redefining Hardware-Software Boundary. VLSI Design Chandra Shekhar, Raj Singh, A. S. Mandal, S. C. Bose, Ravi Saini, Pramod Tanwar
2004	Misc	`conf`	Design of an Application Specific Instruction Set Processor for Parametric Speech Synthesis. VLSI Design Ravi Saini, Pramod Tanwar, A. S. Mandal, S. C. Bose, Raj Singh, Chandra Shekhar
2001	Misc	`conf`	High Frequency Behaviour Of Electron Transport In Silicon And Its Implication For Drain Conductance Of Mos Transistors. VLSI Design B. Prasad, P. J. George, Chandra Shekhar
1998	Misc	`conf`	Evolution of Architectural Concepts and Design Methods of Microprocessors. VLSI Design S. Srivastava, S. C. Bose, B. P. Mathur, Arti Noor, Raj Singh, A. S. Mandal, K. Prabhakaran, Arindam Karmakar, Chandra Shekhar, Sudhir Kumar, Amit K. Agarwal
1992	Misc	`conf`	An ASIC for High Performance Stepper Motor Control. VLSI Design K. V. S. H. Rao, A. Kansal, Chandra Shekhar, M. Srinivas, V. N. S. N. Rao
1992	Misc	`conf`	Design of an Efficient ASIC for the Control of Microwave Ovens. VLSI Design Chandra Shekhar, A. S. Mandal
1992	Misc	`conf`	Using Dedicated Functional Simulator for ASIC Design in Indian Context. VLSI Design K. V. S. H. Rao, Raj Singh, Chandra Shekhar