Chandan Kumar Jha

63 papers A* 2A 5B 4C 7Misc 6Journal 24Unranked 15
YearRankTypeTitle / Venue / Authors
2026 J jnl
Advanced And-Inverter Graph Decomposition Technique for Reducing Circuit Complexity.
ACM Trans. Design Autom. Electr. Syst.
Mohamed A. Nadeem, Luca Müller, Chandan Kumar Jha, Rolf Drechsler
2026 Misc conf
DIVIAC: Library of Input Data Aware Approximate Dividers with Partial Exact Minimization.
VLSID
Chandan Kumar Jha, Sallar Ahmadi-Pour, Sajjad Parvin, Rolf Drechsler
2026 Misc conf
PolyEMAC: Polynomial Error Metrics Analysis in Approximate Computing.
VLSID
Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler
2026 J jnl
veriSiM: Formal Verification of SPICE Netlists for MAGIC-Based Logic-in-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chandan Kumar Jha, Simranjeet Singh, Khushboo Qayyum, Ankit Bende, Muhammad Hassan, Vikas Rana, Farhad Merchant, Rolf Drechsler
2025 J jnl
Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders With Correct Carry Bits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
2025 Misc conf
FARAD: Automated Formal Verification of Approximate Restoring Array Dividers.
VLSID
Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
2025 J jnl
FV-LIDAC: Formally Verified Library of Input Data Aware Approximate Arithmetic Circuits.
ACM Trans. Design Autom. Electr. Syst.
Sallar Ahmadi-Pour, Sajjad Parvin, Chandan Kumar Jha, Rolf Drechsler
2025 — conf
Formal Verification of Error Bounds for Resistive-Switching-Based Multilevel Matrix-Vector Multipliers.
ISQED
Kemal Çaglar Coskun, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2025 J jnl
LLM-assisted Bug Identification and Correction for Verilog HDL.
ACM Trans. Design Autom. Electr. Syst.
Khushboo Qayyum, Chandan Kumar Jha, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
2025 B conf
Large Language Models (LLMs) for Verification, Testing, and Design.
ETS
Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler
2025 J jnl
Polynomial Formal Verification of Multi-Valued Approximate Circuits Within Constant Cutwidth.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler
2025 A conf
Polynomial Formal Verification of Sequential Circuits Using Weighted-AIGs.
DATE
Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler
2025 — conf
Prompt. Verify. Repeat. LLMs in the Hardware Verification Cycle.
COINS
Muhammad Hassan, Mohamed A. Nadeem, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
2025 C conf
River: Sneak Path Aware READ-based In-Memory Computing for 1T1M Memristive Crossbars.
DDECS
Till Schnittka, Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
2025 — conf
Special Session Paper: Application of Functional Verification Techniques in Hardware Trust.
DFT
Mohammad Reza Heidari Iman, Rolf Drechsler, Chandan Kumar Jha, Ali Azarpeyvand, Tara Ghasempouri, Sharjeel Imtiaz, Jaan Raik, Samuele Germiniani, Daniele Nicoletti, Graziano Pravadelli, Giorgio Di Natale
2025 — conf
Special Session Paper: Formal Verification Techniques and Reliability Methods for RRAM-based Computing-in-Memory.
DFT
Chandan Kumar Jha, Sumit Kumar Jha, Ulf Schlichtmann, Rolf Drechsler
2025 C conf
System-Level Design Space Exploration for Matrix Multiplication using Compute-In-Memory Unit.
FDL
Deepak Ravibabu, Sallar Ahmadi-Pour, Muhammad Hassan, Abhoy Kole, Chandan Kumar Jha, Rolf Drechsler
2025 Misc conf
True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET.
VLSID
Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2024 J jnl
EnR: extend and reduce methodology to enable formal verification of truncated adders.
it Inf. Technol.
Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
2024 Misc conf
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array.
VLSID
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
2024 A conf
Hidden Cost of Circuit Design with RFETs.
DATE
Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2024 C conf
In-Memory Mirroring: Cloning Without Reading.
VLSI-SoC
Simranjeet Singh, Ankit Bende, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Sachin B. Patkar, Farhad Merchant
2024 J jnl
In-Memory Mirroring: Cloning Without Reading.
CoRR
Simranjeet Singh, Ankit Bende, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Sachin B. Patkar, Farhad Merchant
2024 Misc conf
Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic.
VLSID
Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
2024 A conf
LLM-Guided Formal Verification Coupled with Mutation Testing.
DATE
Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
2024 — conf
LLMs for Hardware Verification: Frameworks, Techniques, and Future Directions.
ATS
Khushboo Qayyum, Sallar Ahmadi-Pour, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2024 A* conf
Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification.
DAC
Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
2024 J jnl
Lower the RISC: Designing optical-probing-attack-resistant cores.
Microprocess. Microsystems
Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2024 B conf
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory.
ASPDAC
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
2024 B conf
Polynomial Formal Verification of Approximate Adders with Constant Cutwidth.
ETS
Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler
2024 J jnl
cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2024 J jnl
veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Khushboo Qayyum, Kemal Çaglar Coskun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
2023 B conf
Analysis of Conventional, Near-Memory, and In-Memory DNN Accelerators.
ISPASS
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
2023 A conf
Analysis of Quantization Across DNN Accelerator Architecture Paradigms.
DATE
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
2023 — conf
Benchmarking Multiplier Architectures for MAGIC Based In-Memory Computing.
NEWCAS
Chandan Kumar Jha, Rolf Drechsler
2023 J jnl
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array.
CoRR
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
2023 — conf
Finite State Automata Design using 1T1R ReRAM Crossbar.
NEWCAS
Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant
2023 J jnl
Finite State Automata Design using 1T1R ReRAM Crossbar.
CoRR
Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant
2023 — conf
Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core.
COINS
Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2023 J jnl
MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors.
IEEE Trans. Circuits Syst. II Express Briefs
Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
2023 J jnl
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory.
CoRR
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
2023 J jnl
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style.
CoRR
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
2023 J jnl
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style.
IEEE Embed. Syst. Lett.
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
2023 J jnl
Single Exact Single Approximate Adders and Single Exact Dual Approximate Adders.
IEEE Trans. Very Large Scale Integr. Syst.
Chandan Kumar Jha, Ankita Nandi, Joycee Mekie
2022 J jnl
A Fresh Perspective on DNN Accelerators by Performing Holistic Analysis Across Paradigms.
CoRR
Tom Glint, Chandan Kumar Jha, Manu Awasthi, Joycee Mekie
2022 — conf
A fibre Bragg grating sensor-based instrumented glove for virtual rehabilitation applications.
OFC
Chandan Kumar Jha, Arup Lal Chakraborty
2022 — conf
CAR: Community Aware Graph Reordering for Efficient Cache Utilization in Graph Analytics.
VDAT
Shubham Singhania, Neelam Sharma, Varun Venkitaraman, Chandan Kumar Jha
2022 A conf
Data-Aware Cache Management for Graph Analytics.
DATE
Neelam Sharma, Varun Venkitaraman, Newton, Vikash Kumar, Shubham Singhania, Chandan Kumar Jha
2022 — conf
Scalable Construction of Formal Error Guaranteed LUT-Based Approximate Multipliers with Analytical Worst-Case Error Bound.
VDAT
Anishetti Venkatesh, Chandan Kumar Jha, G. U. Vinod, Masahiro Fujita, Virendra Singh
2021 J jnl
Analysis of Worst-Case Data Dependent Temporal Approximation in Floating Point Units.
IEEE Trans. Circuits Syst. II Express Briefs
Chandan Kumar Jha, Ishita Doshi, Joycee Mekie
2021 C conf
FPCAM: Floating Point Configurable Approximate Multiplier for Error Resilient Applications.
ISCAS
Chandan Kumar Jha, Sumit Walia, Gagan Kanojia, Joycee Mekie
2021 J jnl
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications.
CoRR
Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie
2021 J jnl
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker, Manu Awasthi, Joycee Mekie
2020 J jnl
Energy and Error Analysis Framework for Approximate Computing in Mobile Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Chandan Kumar Jha, Sneha N. Ved, Ishant Anand, Joycee Mekie
2020 C conf
FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers.
ISCAS
Chandan Kumar Jha, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie
2020 C conf
SEDAAF: FPGA Based Single Exact Dual Approximate Adders for Approximate Processors.
ISCAS
Chandan Kumar Jha, Kailash Prasad, Arun Singh Tomar, Joycee Mekie
2020 — conf
Tunable Inexact Subtracters for Division in Image Processing Applications.
MWSCAS
Ankita Nandi, Chandan Kumar Jha, Joycee Mekie
2019 C conf
Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs.
DSD
Chandan Kumar Jha, Joycee Mekie
2019 — conf
Quality Tunable Approximate Adder for Low Energy Image Processing Applications.
ICECS
Chandan Kumar Jha, Ankita Nandi, Joycee Mekie
2019 A* conf
SEDA - Single Exact Dual Approximate Adders for Approximate Processors.
DAC
Chandan Kumar Jha, Joycee Mekie
2019 — conf
Should We Code Differently When Using Approximate Circuits?
APCCAS
Ankita Nandi, Chandan Kumar Jha, Joycee Mekie
2018 — conf
A Fiber Bragg Grating Strain Sensor-Based Glove to Accurately Measure the Bend Angle of the Finger Flexed at the Proximal Interphalangeal Joints.
IEEE SENSORS
Chandan Kumar Jha, Arup Lal Chakraborty
2016 J jnl
A Novel Methodology for Design of Cyclic Combinational Circuits.
J. Low Power Electron.
Vinay Kumar, Chandan Kumar Jha, Gaurav Thapa, Anup Dandapat