Chaitali Chakrabarti

321 papers A* 26A 26B 7C 22Misc 23Journal 131Unranked 84
YearRankTypeTitle / Venue / Authors
2026 J jnl
A portable framework with generalized runtime features for task graph execution and concurrent multi-application deployment on heterogeneous systems.
Future Gener. Comput. Syst.
Serhan Gener, Md Sahil Hassan, Hasan Umut Suluhan, Liangliang Chang, Chaitali Chakrabarti, Tsung-Wei Huang, Ümit Y. Ogras, Ali Akoglu
2026 J jnl
CADAS: Communication-Aware Dynamic Scheduler on CGRAs for Large-Volume and Real-Time Processing.
ACM Trans. Embed. Comput. Syst.
Jiahao Lin, Hasan Umut Suluhan, Chaitali Chakrabarti, Ali Akoglu, Ümit Y. Ogras
2026 — conf
Chiplet-NAS: Chiplet-aware Neural Architecture Search for Efficient AI Inference on 2.5D Integration.
ASP-DAC
Cheng Guo, Pragnya Sudershan Nalla, Nikhil K. Cherukuri, Rui Xue, Sachin S. Sapatnekar, Chaitali Chakrabarti, Yu Cao, Jeff Zhang
2026 J jnl
TFL: Targeted Bit-Flip Attack on Large Language Model.
CoRR
Jingkai Guo, Chaitali Chakrabarti, Deliang Fan
2025 — conf
A Unified Portable and Programmable Framework for Task-Based Execution and Dynamic Resource Management on Heterogeneous Systems.
ExHET@PPoPP
Serhan Gener, Md Sahil Hassan, Liangliang Chang, Chaitali Chakrabarti, Tsung-Wei Huang, Ümit Y. Ogras, Ali Akoglu
2025 J jnl
An Overview of Challenges and Requirements for Real-Time Spectrum Sensing in Modern RF Autonomy Systems.
IEEE Des. Test
Jiahao Lin, Hasan Umut Suluhan, Hyunwon Chung, Arindam Dutta, Anish Vipperla, Gerard Gubash, Jacob Holtom, Bernd-Peter Paris, Chaitali Chakrabarti, Daniel W. Bliss, David T. Blaauw, Hun-Seok Kim, Ali Akoglu, Ümit Y. Ogras
2025 A conf
CLAIRE: Composable Chiplet Libraries for AI Inference.
DATE
Pragnya Sudershan Nalla, Emad Haque, Yaotian Liu, Sachin S. Sapatnekar, Jeff Zhang, Chaitali Chakrabarti, Yu Cao
2025 J jnl
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System.
ACM Trans. Embed. Comput. Syst.
Liangliang Chang, Serhan Gener, Joshua Mack, Hasan Umut Suluhan, Ali Akoglu, Chaitali Chakrabarti
2025 J jnl
Compilation Framework for Dynamically Reconfigurable Array Architectures.
IEEE Access
Anish Vipperla, Narayanan Murugan, Ali Akoglu, Chaitali Chakrabarti
2025 — conf
Feature-Based Learning for Computationally Efficient Estimation in High-Frequency Time-Varying Spectrum-Sharing Environments.
IEEECONF
Pinjia Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2025 J jnl
HISIM: Analytical Performance Modeling and Design Space Exploration of 2.5D/3D Integration for AI Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhenyu Wang, Pragnya Sudershan Nalla, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Jae-sun Seo, Vidya A. Chhabria, Jeff Zhang, Chaitali Chakrabarti, Ümit Y. Ogras, Yu Cao
2025 J jnl
HeteroSFL: Split Federated Learning With Heterogeneous Clients and Non-IID Data.
IEEE Internet Things J.
Xing Chen, Jingtao Li, Deliang Fan, Chaitali Chakrabarti
2025 A* conf
Invited: EDA for Heterogeneous Integration.
DAC
Emad Haque, Pragnya Sudershan Nalla, Chetal Choppali Sudarshan, Divya Yogi, Hangyu Zhang, Chaitali Chakrabarti, Vidya A. Chhabria, Ramesh Harjani, Jeff Zhang, Sachin S. Sapatnekar
2025 A conf
K-PACT: Kernel Planning for Adaptive Context Switching - A Framework for Clustering, Placement, and Prefetching in Spectrum Sensing.
ICCAD
Hasan Umut Suluhan, Jiahao Lin, Serhan Gener, Chaitali Chakrabarti, Ümit Y. Ogras, Ali Akoglu
2025 J jnl
K-PACT: Kernel Planning for Adaptive Context Switching - A Framework for Clustering, Placement, and Prefetching in Spectrum Sensing.
CoRR
Hasan Umut Suluhan, Jiahao Lin, Serhan Gener, Chaitali Chakrabarti, Ümit Y. Ogras, Ali Akoglu
2025 — conf
Low-Cost and Scalable Zone-Specific CSI System for FutureG Networks.
IEEECONF
Yan Xiong, Ahmed Alkhateeb, Chaitali Chakrabarti
2025 — conf
ML4SODA: A Decision Tree Guided Design Space Exploration for Fast and High Quality MLIR-based HLS.
ACM Great Lakes Symposium on VLSI
Darshith Manjunath, Nicolas Bohm Agostini, Antonino Tumeo, Jeff Zhang, Chaitali Chakrabarti
2025 A conf
Mitigating Overfitting During Speech Foundation Model Fine-tuning: Applications to Dysarthric Speech Detection.
INTERSPEECH
Yan Xiong, Visar Berisha, Julie Liss, Chaitali Chakrabarti
2025 A* conf
Phantom: Privacy-Preserving Deep Neural Network Model Obfuscation in Heterogeneous TEE and GPU System.
USENIX Security Symposium
Juyang Bai, Md Hafizul Islam Chowdhuryy, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Deliang Fan
2025 J jnl
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing.
CoRR
Serhan Gener, Aditya Ukarande, Shilpa Mysore Srinivasa Murthy, Md Sahil Hassan, Joshua Mack, Chaitali Chakrabarti, Ümit Y. Ogras, Ali Akoglu
2025 J jnl
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing.
ACM Trans. Embed. Comput. Syst.
Serhan Gener, Aditya Ukarande, Shilpa Mysore Srinivasa Murthy, Md Sahil Hassan, Joshua Mack, Chaitali Chakrabarti, Ümit Y. Ogras, Ali Akoglu
2025 J jnl
SBFA: Single Sneaky Bit Flip Attack to Break Large Language Models.
CoRR
Jingkai Guo, Chaitali Chakrabarti, Deliang Fan
2025 A conf
TEE-SFL: Time and Energy-efficient solution for addressing communication heterogeneity in Split Federated Learning Schemes.
ISLPED
Ziyi Zhao, Qifeng Chen, Jingtao Li, Deliang Fan, Chaitali Chakrabarti
2025 J jnl
Tiny Chiplets Enabled by Packaging Scaling: Opportunities in ESD Protection and Signal Integrity.
CoRR
Emad Haque, Pragnya Sudershan Nalla, Jeff Zhang, Sachin S. Sapatnekar, Chaitali Chakrabarti, Yu Cao
2024 J jnl
Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs.
IEEE Trans. Computers
Benjamin R. Willis, Aviral Shrivastava, Joshua Mack, Shail Dave, Chaitali Chakrabarti, John S. Brunhaver
2024 A* conf
EMGAN: Early-Mix-GAN on Extracting Server-Side Model in Split Federated Learning.
AAAI
Jingtao Li, Xing Chen, Li Yang, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti
2024 B conf
Exploiting 2.5D/3D Heterogeneous Integration for AI Computing.
ASPDAC
Zhenyu Wang, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Yaotian Liu, Jae-sun Seo, Chaitali Chakrabarti, Ümit Y. Ogras, Vidya A. Chhabria, Jeff Zhang, Yu Cao
2024 J jnl
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs).
IEEE Des. Test
Anish Krishnakumar, Hanguang Yu, Tutu Ajayi, A. Alper Goksoy, Vishrut Pandey, Joshua Mack, Md Sahil Hassan, Kuan-Yu Chen, Chaitali Chakrabarti, Daniel W. Bliss, Ali Akoglu, Hun-Seok Kim, Ronald G. Dreslinski, David T. Blaauw, Ümit Y. Ogras
2024 A conf
Improving Speech-Based Dysarthria Detection using Multi-task Learning with Gradient Projection.
INTERSPEECH
Yan Xiong, Visar Berisha, Julie Liss, Chaitali Chakrabarti
2024 — ch.
In-Memory Computing for AI Accelerators: Challenges and Solutions.
Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2024 J jnl
PED: Probabilistic Energy-efficient Deadline-aware scheduler for heterogeneous SoCs.
J. Syst. Archit.
Xing Chen, Anish Krishnakumar, Ümit Y. Ogras, Chaitali Chakrabarti
2023 J jnl
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher.
CoRR
Yichen Yang, Jingtao Li, Nishil Talati, Subhankar Pal, Siying Feng, Chaitali Chakrabarti, Trevor N. Mudge, Ronald G. Dreslinski
2023 A conf
Aligning Speech Enhancement for Improving Downstream Classification Performance.
INTERSPEECH
Yan Xiong, Visar Berisha, Chaitali Chakrabarti
2023 — conf
Benchmarking Heterogeneous Integration with 2.5D/3D Interconnect Modeling.
ASICON
Zhenyu Wang, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Jae-sun Seo, Chaitali Chakrabarti, Ümit Y. Ogras, Vidya A. Chhabria, Yu Cao
2023 J jnl
Communications and High-Precision Positioning (CHP2): Hardware Architecture, Implementation, and Validation.
Sensors
Hanguang Yu, Andrew Herschfelt, Shunyao Wu, Sharanya Srinivas, Yang Li, Nunzio Sciammetta, Leslie Smith, Klaus Rueger, Hyunseok Lee, Chaitali Chakrabarti, Daniel W. Bliss
2023 A* conf
MocoSFL: enabling cross-client collaborative self-supervised learning.
ICLR
Jingtao Li, Lingjuan Lyu, Daisuke Iso, Chaitali Chakrabarti, Michael Spranger
2023 J jnl
Model Extraction Attacks on Split Federated Learning.
CoRR
Jingtao Li, Adnan Siraj Rakin, Xing Chen, Li Yang, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2023 J jnl
Proactively Predicting Dynamic 6G Link Blockages Using LiDAR and In-Band Signatures.
IEEE Open J. Commun. Soc.
Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb
2022 — conf
An Adjustable Farthest Point Sampling Method for Approximately-sorted Point Cloud Data.
SiPS
Jingtao Li, Jian Zhou, Yan Xiong, Xing Chen, Chaitali Chakrabarti
2022 J jnl
An Adjustable Farthest Point Sampling Method for Approximately-sorted Point Cloud Data.
CoRR
Jingtao Li, Jian Zhou, Yan Xiong, Xing Chen, Chaitali Chakrabarti
2022 A conf
Big-Little Chiplets for In-Memory Acceleration of DNNs: A Scalable Heterogeneous Architecture.
ICCAD
Gokul Krishnan, A. Alper Goksoy, Sumit K. Mandal, Zhenyu Wang, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2022 J jnl
Blockage Prediction Using Wireless Signatures: Deep Learning Enables Real-World Demonstration.
IEEE Open J. Commun. Soc.
Shunyao Wu, Muhammad Alrabeiah, Chaitali Chakrabarti, Ahmed Alkhateeb
2022 — conf
Deep Learning for Moving Blockage Prediction using Real mmWave Measurements.
ICC
Shunyao Wu, Muhammad Alrabeiah, Andrew Hredzak, Chaitali Chakrabarti, Ahmed Alkhateeb
2022 C conf
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.
ISCAS
Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Yukang Fu, A. Alper Goksoy, Xin He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Yang Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, Ümit Y. Ogras, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue
2022 J jnl
Energy and Loss-aware Selective Updating for SplitFed Learning with Energy Harvesting-Powered Devices.
J. Signal Process. Syst.
Xing Chen, Jingtao Li, Chaitali Chakrabarti
2022 J jnl
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks.
ACM J. Emerg. Technol. Comput. Syst.
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2022 C conf
Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration.
ISCAS
Yan Xiong, Jingtao Li, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2022 B conf
LiDAR-Aided Mobile Blockage Prediction in Real-World Millimeter Wave Systems.
WCNC
Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb
2022 J jnl
Proactively Predicting Dynamic 6G Link Blockages Using LiDAR and In-Band Signatures.
CoRR
Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb
2022 J jnl
Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs.
ACM Trans. Embed. Comput. Syst.
Xing Chen, Ümit Y. Ogras, Chaitali Chakrabarti
2022 — conf
Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC.
ISPA/BDCloud/SocialCom/SustainCom
Liangliang Chang, Joshua Mack, Benjamin R. Willis, Xing Chen, John S. Brunhaver, Ali Akoglu, Chaitali Chakrabarti
2022 J jnl
Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC.
CoRR
Liangliang Chang, Joshua Mack, Benjamin R. Willis, Xing Chen, John S. Brunhaver, Ali Akoglu, Chaitali Chakrabarti
2022 A* conf
ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning.
CVPR
Jingtao Li, Adnan Siraj Rakin, Xing Chen, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2022 J jnl
ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning.
CoRR
Jingtao Li, Adnan Siraj Rakin, Xing Chen, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2022 J jnl
T-BFA: Targeted Bit-Flip Adversarial Weight Attack.
IEEE Trans. Pattern Anal. Mach. Intell.
Adnan Siraj Rakin, Zhezhi He, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Deliang Fan
2022 J jnl
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.
IEEE J. Solid State Circuits
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2021 J jnl
Blockage Prediction Using Wireless Signatures: Deep Learning Enables Real-World Demonstration.
CoRR
Shunyao Wu, Muhammad Alrabeiah, Chaitali Chakrabarti, Ahmed Alkhateeb
2021 A* conf
CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics.
DAC
Siying Feng, Jiawen Sun, Subhankar Pal, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski
2021 — conf
Communication and Computation Reduction for Split Learning using Asynchronous Training.
SiPS
Xing Chen, Jingtao Li, Chaitali Chakrabarti
2021 J jnl
Communication and Computation Reduction for Split Learning using Asynchronous Training.
CoRR
Xing Chen, Jingtao Li, Chaitali Chakrabarti
2021 — conf
Computationally-efficient voice activity detection based on deep neural networks.
SiPS
Yan Xiong, Visar Berisha, Chaitali Chakrabarti
2021 J jnl
Deep Learning for Moving Blockage Prediction using Real Millimeter Wave Measurements.
CoRR
Shunyao Wu, Muhammad Alrabeiah, Andrew Hredzak, Chaitali Chakrabarti, Ahmed Alkhateeb
2021 J jnl
Front-End Architecture Design for Low-Complexity 3-D Ultrasound Imaging Based on Synthetic Aperture Sequential Beamforming.
IEEE Trans. Very Large Scale Integr. Syst.
Jian Zhou, Sumit K. Mandal, Brendan L. West, Siyuan Wei, Ümit Y. Ogras, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti
2021 J jnl
Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks.
CoRR
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2021 J jnl
LiDAR-Aided Mobile Blockage Prediction in Real-World Millimeter Wave Systems.
CoRR
Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb
2021 — conf
NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing.
HOST
Jingtao Li, Zhezhi He, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti
2021 J jnl
NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing.
CoRR
Jingtao Li, Zhezhi He, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti
2021 J jnl
RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracy.
CoRR
Adnan Siraj Rakin, Li Yang, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Yu Cao, Jae-sun Seo, Deliang Fan
2021 A conf
RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery.
DATE
Jingtao Li, Adnan Siraj Rakin, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2021 J jnl
RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery.
CoRR
Jingtao Li, Adnan Siraj Rakin, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2021 J jnl
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks.
CoRR
Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2021 J jnl
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks.
ACM Trans. Embed. Comput. Syst.
Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2021 — conf
System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.
ASICON
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2021 — conf
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
VLSI Circuits
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2021 J jnl
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
CoRR
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2020 J jnl
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator.
IEEE J. Solid State Circuits
Dong-Hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Bedford Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
2020 J jnl
A Latency-Optimized Reconfigurable NoC for In-Memory Acceleration of DNNs.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Sumit K. Mandal, Gokul Krishnan, Chaitali Chakrabarti, Jae-sun Seo, Yu Cao, Ümit Y. Ogras
2020 C conf
Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture.
ISCAS
Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2020 Misc conf
Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture.
ICASSP
A. Soorishetty, Jian Zhou, Subhankar Pal, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2020 J jnl
An 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity for On-Device Speech Recognition.
IEEE J. Solid State Circuits
Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2020 J jnl
Automated Parallel Kernel Extraction from Dynamic Application Traces.
CoRR
Richard Uhrie, Chaitali Chakrabarti, John S. Brunhaver
2020 A conf
Compressing LSTM Networks with Hierarchical Coarse-Grain Sparsity.
INTERSPEECH
Deepak Kadetotad, Jian Meng, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2020 A* conf
Defending Bit-Flip Attack through DNN Weight Reconstruction.
DAC
Jingtao Li, Adnan Siraj Rakin, Yan Xiong, Liangliang Chang, Zhezhi He, Deliang Fan, Chaitali Chakrabarti
2020 A* conf
Defending and Harnessing the Bit-Flip Based Adversarial Weight Attack.
CVPR
Zhezhi He, Adnan Siraj Rakin, Jingtao Li, Chaitali Chakrabarti, Deliang Fan
2020 J jnl
Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs.
IEEE Des. Test
Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao
2020 J jnl
Parallel Gibbs Sampler for Wavelet-Based Bayesian Compressive Sensing with High Reconstruction Accuracy.
J. Signal Process. Syst.
Jian Zhou, Antonia Papandreou-Suppappola, Chaitali Chakrabarti
2020 J jnl
T-BFA: Targeted Bit-Flip Adversarial Weight Attack.
CoRR
Adnan Siraj Rakin, Zhezhi He, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Deliang Fan
2020 J jnl
Tetris: Using Software/Hardware Co-Design to Enable Handheld, Physics-Limited 3D Plane-Wave Ultrasound Imaging.
IEEE Trans. Computers
Brendan L. West, Jian Zhou, Ronald G. Dreslinski, Oliver D. Kripfgans, J. Brian Fowlkes, Chaitali Chakrabarti, Thomas F. Wenisch
2020 B conf
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration.
PACT
Subhankar Pal, Siying Feng, Dong-Hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk, John Magnus Morton, Jiawen Sun, Michael F. P. O'Boyle, Murray Cole, Chaitali Chakrabarti, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski
2019 — conf
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm.
VLSI Circuits
Subhankar Pal, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
2019 — conf
A 8.93-TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity With All Parameters Stored On-Chip.
ESSCIRC
Deepak Kadetotad, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2019 J jnl
A Deep Q-Learning Approach for Dynamic Management of Heterogeneous Processors.
IEEE Comput. Archit. Lett.
Ujjwal Gupta, Sumit K. Mandal, Manqing Mao, Chaitali Chakrabarti, Ümit Y. Ogras
2019 J jnl
Articulation constrained learning with application to speech emotion recognition.
EURASIP J. Audio Speech Music. Process.
Mohit Shah, Ming Tu, Visar Berisha, Chaitali Chakrabarti, Andreas Spanias
2019 J jnl
Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems.
IEEE Trans. Computers
Hsing Min Chen, Shin-Ying Lee, Trevor N. Mudge, Carole-Jean Wu, Chaitali Chakrabarti
2019 — conf
Improving Reliability of ReRAM-Based DNN Implementation through Novel Weight Distribution.
SiPS
Jingtao Li, Manqing Mao, Chaitali Chakrabarti
2019 Misc conf
Joint Optimization of Quantization and Structured Sparsity for Compressed Deep Neural Networks.
ICASSP
Gaurav Srivastava, Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo
2019 J jnl
Low Complexity, Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low-Power Mobile Vision Applications.
IEEE Trans. Circuits Syst. Video Technol.
Ziyun Li, Jiang Xiang, Luyao Gong, David T. Blaauw, Chaitali Chakrabarti, Hun-Seok Kim
2019 J jnl
MAX
IEEE J. Emerg. Sel. Topics Circuits Syst.
Manqing Mao, Xiaochen Peng, Rui Liu, Jingtao Li, Shimeng Yu, Chaitali Chakrabarti
2019 A conf
Residual + Capsule Networks (ResCap) for Simultaneous Single-Channel Overlapped Keyword Recognition.
INTERSPEECH
Yan Xiong, Visar Berisha, Chaitali Chakrabarti
2019 A* conf
Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging.
DAC
Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F. Wenisch
2018 J jnl
A Fixed-Point Neural Network Architecture for Speech Applications on Resource Constrained Hardware.
J. Signal Process. Syst.
Mohit Shah, Sairam Arunachalam, Jingcheng Wang, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim, Jae-sun Seo, Chaitali Chakrabarti
2018 — conf
A Parallel RRAM Synaptic Array Architecture for Energy-Efficient Recurrent Neural Networks.
SiPS
Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo, Chaitali Chakrabarti
2018 — conf
A Versatile ReRAM-based Accelerator for Convolutional Neural Networks.
SiPS
Manqing Mao, Xiaoyu Sun, Xiaochen Peng, Shimeng Yu, Chaitali Chakrabarti
2018 J jnl
Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System.
IEEE Trans. Very Large Scale Integr. Syst.
Manqing Mao, Shimeng Yu, Chaitali Chakrabarti
2018 J jnl
Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression.
CoRR
Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo
2018 A* conf
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator.
HPCA
Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2018 — conf
Parallel Wavelet-based Bayesian Compressive Sensing based on Gibbs Sampling.
SiPS
Jian Zhou, Chaitali Chakrabarti
2018 J jnl
Reducing Energy of Baseband Processor for IoT Terminals with Long Range Wireless Communications.
J. Signal Process. Syst.
Shunyao Wu, Chaitali Chakrabarti, Hyunseok Lee
2017 J jnl
A Multilayer Approach to Designing Energy-Efficient and Reliable ReRAM Cross-Point Array System.
IEEE Trans. Very Large Scale Integr. Syst.
Manqing Mao, Pai-Yu Chen, Shimeng Yu, Chaitali Chakrabarti
2017 J jnl
Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activations.
CoRR
Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
2017 — conf
Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations.
BioCAS
Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo
2017 J jnl
Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance.
IEEE Trans. Multi Scale Comput. Syst.
Chengen Yang, Manqing Mao, Yu Cao, Chaitali Chakrabarti
2017 — conf
Fluid wireless protocols: energy-efficient design and implementation.
ESTIMedia
Ganapati Bhat, Sharanya Srinivas, Vamsi Chagari, Jaehyun Park, Thomas McGiffen, Hyunseok Lee, Daniel W. Bliss, Chaitali Chakrabarti, Ümit Y. Ogras
2017 — conf
Low-power neuromorphic speech recognition engine with coarse-grain sparsity.
ASP-DAC
Shunti Yin, Deepak Kadetotad, Bonan Yan, Chang Song, Yiran Chen, Chaitali Chakrabarti, Jae-sun Seo
2017 Misc conf
Minimizing area and energy of deep learning hardware design using collective low precision and structured compression.
ACSSC
Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo
2016 — conf
Checkpointing Exascale Memory Systems with Existing Memory Technologies.
MEMSYS
Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge
2016 C conf
Design of a reliable RRAM-based PUF for compact hardware security primitives.
ISCAS
Ayush Shrivastava, Pai-Yu Chen, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2016 A conf
Efficient memory compression in deep neural networks using coarse-grain sparsification for speech applications.
ICCAD
Deepak Kadetotad, Sairam Arunachalam, Chaitali Chakrabarti, Jae-sun Seo
2016 — conf
Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low Power Vision Applications.
SiPS
Jiang Xiang, Ziyun Li, Hun-Seok Kim, Chaitali Chakrabarti
2016 — conf
Low Complexity 3D Ultrasound Imaging Using Synthetic Aperture Sequential Beamforming.
SiPS
Jian Zhou, Siyuan Wei, Richard Sampson, Ming Yang, Rungroj Jintamethasawat, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti
2016 B conf
Low complexity optical flow using neighbor-guided semi-global matching.
ICIP
Jiang Xiang, Ziyun Li, David T. Blaauw, Hun-Seok Kim, Chaitali Chakrabarti
2016 — conf
Low power baseband processor for IoT terminals with long range wireless communications.
GlobalSIP
Shunyao Wu, Sungmoon Kang, Chaitali Chakrabarti, Hyunseok Lee
2016 J jnl
Optimizing Latency, Energy, and Reliability of 1T1R ReRAM Through Cross-Layer Techniques.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2016 J jnl
RATT-ECC: Rate Adaptive Two-Tiered Error Correction Codes for Reliable 3D Die-Stacked Memory.
ACM Trans. Archit. Code Optim.
Hsing Min Chen, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti
2016 J jnl
Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems.
IEEE Trans. Computers
Hsing Min Chen, Supreet Jeloka, Akhil Arunkumar, David T. Blaauw, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti
2015 — conf
A fixed-point neural network for keyword detection on resource constrained hardware.
SiPS
Mohit Shah, Jingcheng Wang, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim, Chaitali Chakrabarti
2015 J jnl
An overview of recent advances on distributed and agile sensing algorithms and implementation.
Digit. Signal Process.
Mahesh K. Banavar, Jun Jason Zhang, Bhavana Chakraborty, Homin Kwon, Ying Li, Huaiguang Jiang, Andreas Spanias, Cihan Tepedelenlioglu, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2015 — conf
E-ECC: Low Power Erasure and Error Correction Schemes for Increasing Reliability of Commodity DRAM Systems.
MEMSYS
Hsing Min Chen, Akhil Arunkumar, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti
2015 — conf
Exploiting resistive cross-point array for compact design of physical unclonable function.
HOST
Pai-Yu Chen, Runchen Fang, Rui Liu, Chaitali Chakrabarti, Yu Cao, Shimeng Yu
2015 J jnl
High Frame Rate 3-D Ultrasound Imaging Using Separable Beamforming.
J. Signal Process. Syst.
Ming Yang, Richard Sampson, Siyuan Wei, Thomas F. Wenisch, Chaitali Chakrabarti
2015 — conf
Low cost clutter filter for 3D ultrasonic flow estimation.
SiPS
Siyuan Wei, Ming Yang, Richard Sampson, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti
2015 C conf
Optimizing latency, energy, and reliability of 1T1R ReRAM through appropriate voltage settings.
ICCD
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2015 — conf
Programming strategies to improve energy efficiency and reliability of ReRAM memory systems.
SiPS
Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti
2015 J jnl
Separable Beamforming For 3-D Medical Ultrasound Imaging.
IEEE Trans. Signal Process.
Ming Yang, Richard Sampson, Siyuan Wei, Thomas F. Wenisch, Chaitali Chakrabarti
2015 J jnl
Using Graphics Processing Units in an LTE Base Station.
J. Signal Process. Syst.
Qi Zheng, Yajing Chen, Hyunseok Lee, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2015 J jnl
Within and cross-corpus speech emotion recognition using latent topic model-based features.
EURASIP J. Audio Speech Music. Process.
Mohit Shah, Chaitali Chakrabarti, Andreas Spanias
2014 J jnl
A Distributed Canny Edge Detector: Algorithm and FPGA Implementation.
IEEE Trans. Image Process.
Qian Xu, Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam
2014 J jnl
A Low Cost Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell Pram.
J. Signal Process. Syst.
Chengen Yang, Yunus Emre, Zihan Xu, Hsing Min Chen, Yu Cao, Chaitali Chakrabarti
2014 Misc conf
A hybrid approach to offloading mobile image classification.
ICASSP
Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge
2014 — conf
A low complexity scheme for accurate 3D velocity estimation in ultrasound systems.
SiPS
Siyuan Wei, Ming Yang, Chaitali Chakrabarti, Richard Sampson, Thomas F. Wenisch, Oliver Kripfgans, J. Brian Fowlkes
2014 C conf
A multi-modal approach to emotion recognition using undirected topic models.
ISCAS
Mohit Shah, Chaitali Chakrabarti, Andreas Spanias
2014 C conf
Image processing using approximate datapath units.
ISCAS
Madhu Vasudevan, Chaitali Chakrabarti
2014 J jnl
Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding.
J. Signal Process. Syst.
Chengen Yang, Hsing Min Chen, Trevor N. Mudge, Chaitali Chakrabarti
2014 — conf
Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systems.
SiPS
Manqing Mao, Chengen Yang, Zihan Xu, Yu Cao, Chaitali Chakrabarti
2014 J jnl
Sonic Millip3De: An Architecture for Handheld 3D Ultrasound.
IEEE Micro
Richard Sampson, Ming Yang, Siyuan Wei, Chaitali Chakrabarti, Thomas F. Wenisch
2013 — conf
A parallel stochastic computing system with improved accuracy.
SiPS
Lifeng Miao, Chaitali Chakrabarti
2013 Misc conf
A speech emotion recognition framework based on latent Dirichlet allocation: Algorithm and FPGA implementation.
ICASSP
Mohit Shah, Lifeng Miao, Chaitali Chakrabarti, Andreas Spanias
2013 — conf
Architecting an LTE base station with graphics processing units.
SiPS
Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2013 — conf
Compact modeling of STT-MTJ for SPICE simulation.
ESSDERC
Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao
2013 Misc conf
Data storage time sensitive ECC schemes for MLC NAND Flash memories.
ICASSP
Chengen Yang, Deepak Muckatira, Aditya Kulkarni, Chaitali Chakrabarti
2013 J jnl
Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and Real-Time FPGA Implementation.
IEEE Trans. Signal Process.
Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2013 J jnl
Energy and Quality-Aware Multimedia Signal Processing.
IEEE Trans. Multim.
Yunus Emre, Chaitali Chakrabarti
2013 A conf
Exploring DRAM organizations for energy-efficient and resilient exascale memories.
SC
Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw
2013 J jnl
Hardware Acceleration for Neuromorphic Vision Algorithms.
J. Signal Process. Syst.
Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2013 J jnl
Multi-source Neural Activity Estimation and Sensor Scheduling: Algorithms and Hardware Implementation.
J. Signal Process. Syst.
Lifeng Miao, Stefanos Michael, Narayan Kovvali, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2013 C conf
Parallelization techniques for implementing trellis algorithms on graphics processors.
ISCAS
Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2013 — conf
Separable beamforming for 3-D synthetic aperture ultrasound imaging.
SiPS
Ming Yang, Richard Sampson, Thomas F. Wenisch, Chaitali Chakrabarti
2013 A* conf
Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound.
HPCA
Richard Sampson, Ming Yang, Siyuan Wei, Chaitali Chakrabarti, Thomas F. Wenisch
2013 J jnl
Techniques for Compensating Memory Errors in JPEG2000.
IEEE Trans. Very Large Scale Integr. Syst.
Yunus Emre, Chaitali Chakrabarti
2013 — conf
WiBench: An open source kernel suite for benchmarking wireless systems.
IISWC
Qi Zheng, Yajing Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2012 J jnl
A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS.
IEEE J. Solid State Circuits
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2012 — conf
A top-down design methodology using virtual platforms for concept development.
ISQED
Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias
2012 A* conf
Accelerating neuromorphic vision algorithms for recognition.
DAC
Ahmed Al-Maashri, Michael DeBole, Matthew Cotter, Nandhini Chandramoorthy, Yang Xiao, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2012 — conf
An analytical approach to efficient circuit variability analysis in scaled CMOS design.
ISQED
Samatha Gummalla, Anupama R. Subramaniam, Yu Cao, Chaitali Chakrabarti
2012 C conf
Design of orthogonal coded excitation for synthetic aperture imaging in ultrasound systems.
ISCAS
Ming Yang, Chaitali Chakrabarti
2012 — conf
EEG/MEG artifact suppression for improved neural activity estimation.
ACSCC
Alexander Maurer, Lifeng Miao, Jun Jason Zhang, Narayan Kovvali, Antonia Papandreou-Suppappola, Chaitali Chakrabarti
2012 — conf
Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques.
SiPS
Yunus Emre, Chengen Yang, Ketul Sutaria, Yu Cao, Chaitali Chakrabarti
2012 — conf
Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs.
ICICDT
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2012 C conf
Hierarchical modeling of Phase Change memory for reliable design.
ICCD
Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao
2012 J jnl
Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding.
EURASIP J. Adv. Signal Process.
Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti
2012 — conf
Lifelogging: Archival and retrieval of continuously recorded audio using wearable devices.
ESPA
Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias
2012 — conf
Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell PRAM.
SiPS
Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti
2012 Misc conf
Neural activity tracking using spatial compressive particle filtering.
ICASSP
Lifeng Miao, Jun Jason Zhang, Antonia Papandreou-Suppappola, Chaitali Chakrabarti
2012 J jnl
Parallel High Throughput Soft-Output Sphere Decoding Algorithm.
J. Signal Process. Syst.
Qi Qi, Chaitali Chakrabarti
2012 A* conf
Process variation in near-threshold wide SIMD architectures.
DAC
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge
2012 J jnl
Product Code Schemes for Error Correction in MLC NAND Flash Memories.
IEEE Trans. Very Large Scale Integr. Syst.
Chengen Yang, Yunus Emre, Chaitali Chakrabarti
2012 J jnl
Quality-Aware Techniques for Reducing Power of JPEG Codecs.
J. Signal Process. Syst.
Yunus Emre, Chaitali Chakrabarti
2012 — conf
Reducing the Complexity of Orthogonal Code Based Synthetic Aperture Ultrasound System.
SiPS
Ming Yang, Siyuan Wei, Chaitali Chakrabarti
2012 C conf
Transpose-free SAR imaging on FPGA platform.
ISCAS
Chi-Li Yu, Chaitali Chakrabarti
2011 — conf
A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining.
ISSCC
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011 A conf
A framework for accelerating neuromorphic-vision algorithms on FPGAs.
ICCAD
Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2011 — conf
A hardware architecture for accelerating neuromorphic vision algorithms.
SiPS
Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2011 J jnl
Accurate Area, Time and Power Models for FPGA-Based Implementations.
J. Signal Process. Syst.
Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Chaitali Chakrabarti
2011 J jnl
Algorithm and Parallel Implementation of Particle Filtering and its Use in Waveform-Agile Sensing.
J. Signal Process. Syst.
Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2011 A* conf
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs.
DAC
Srinidhi Kestur, Kevin M. Irick, Sungho Park, Ahmed Al-Maashri, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2011 Misc conf
Data-path and memory error compensation technique for low power JPEG implementation.
ICASSP
Yunus Emre, Chaitali Chakrabarti
2011 Misc conf
Energy-optimized high performance FFT processor.
ICASSP
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011 J jnl
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.
J. Signal Process. Syst.
Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2011 — conf
FPGA-accelerator system for computing biologically inspired feature extraction models.
ACSCC
Michael DeBole, Yang Xiao, Chi-Li Yu, Ahmed Al-Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2011 — conf
Flexible product code-based ECC schemes for MLC NAND Flash memories.
SiPS
Chengen Yang, Yunus Emre, Chaitali Chakrabarti, Trevor N. Mudge
2011 Misc conf
LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches.
VLSI Design
Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti
2011 — conf
Low energy motion estimation via selective aproximations.
ASAP
Yunus Emre, Chaitali Chakrabarti
2011 J jnl
Multidimensional DFT IP Generator for FPGA Platforms.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan
2011 A* conf
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design.
DAC
Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester
2011 — conf
Real-time closed-loop tracking of an unknown number of neural sources using probability hypothesis density particle filtering.
SiPS
Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola, Narayan Kovvali
2010 J jnl
A Low-Power DSP for Wireless Communications.
IEEE Trans. Very Large Scale Integr. Syst.
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudge
2010 Misc conf
A distributed psycho-visually motivated Canny edge detector.
ICASSP
Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam, Judit Martinez Bauza
2010 A conf
A special-purpose compiler for look-up table and code generation for function evaluation.
DATE
Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, Sai Prashanth Muralidhara, Hui Zhao, Mahmut T. Kandemir, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2010 J jnl
AnySP: Anytime Anywhere Anyway Signal Processing.
IEEE Micro
Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
2010 Misc conf
Bandwidth-intensive FPGA architecture for multi-dimensional DFT.
ICASSP
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan
2010 A conf
Diet SODA: a power-efficient processor for digital cameras.
ISLPED
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge
2010 Misc conf
Energy-aware adaptive OFDM systems.
ICASSP
Yunus Emre, Chaitali Chakrabarti
2010 J jnl
Mobile Supercomputers for the Next-Generation Cell Phone.
Computer
Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti
2009 J jnl
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization.
IEEE Trans. Computers
Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2009 B conf
An H.264/SVC memory architecture supporting spatial and course-grained quality scalabilities.
ICIP
Niranjan D. Narvekar, Bharatan Konnanath, Shalin M. Mehta, Santosh Chintalapati, Ismail AlKamal, Chaitali Chakrabarti, Lina J. Karam
2009 A* conf
AnySP: anytime anywhere anyway signal processing.
ISCA
Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
2009 J jnl
Architecture-aware LDPC code design for multiprocessor software defined radio systems.
IEEE Trans. Signal Process.
Yuming Zhu, Chaitali Chakrabarti
2009 — conf
Customizing wide-SIMD architectures for H.264.
ICSAMOS
Sangwon Seo, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Sunfaram Vijay, Chaitali Chakrabarti
2009 J jnl
Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy
2009 J jnl
Energy-Efficient Video Transmission Over a Wireless Link.
IEEE Trans. Veh. Technol.
Ye Li, Martin Reisslein, Chaitali Chakrabarti
2009 A* conf
Energy-aware error control coding for Flash memories.
DAC
Veera Papirla, Chaitali Chakrabarti
2009 — conf
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data.
SiPS
Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti
2009 A conf
Low power robust signal processing.
ISLPED
Veera Papirla, Aarul Jain, Chaitali Chakrabarti
2009 J jnl
Maximizing the Lifetime of Embedded Systems Powered by Fuel Cell-Battery Hybrids.
IEEE Trans. Very Large Scale Integr. Syst.
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang, Sarma B. K. Vrudhula
2008 J jnl
A fuel-cell-battery hybrid for portable embedded systems.
ACM Trans. Design Autom. Electr. Syst.
Kyungsoo Lee, Naehyuck Chang, Jianli Zhuo, Chaitali Chakrabarti, Sudheendra Kadri, Sarma B. K. Vrudhula
2008 — conf
A parameterized dataflow language extension for embedded streaming systems.
ICSAMOS
Yuan Lin, Yoonseo Choi, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti
2008 Misc conf
Accurate models for estimating area and power of FPGA implementations.
ICASSP
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabarti
2008 — conf
Efficient image reconstruction using partial 2D Fourier transform.
SiPS
Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan
2008 — conf
Efficient mapping of advanced signal processing algorithms on multi-processor architectures.
SiPS
Bhavana B. Manjunath, Aaron S. Williams, Chaitali Chakrabarti, Antonia Papandreou-Suppappola
2008 J jnl
Energy-efficient dynamic task scheduling algorithms for DVS systems.
ACM Trans. Embed. Comput. Syst.
Jianli Zhuo, Chaitali Chakrabarti
2008 A conf
Extending the lifetime of media recorders constrained by battery and flash memory size.
ISLPED
Younghyun Kim, Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Nam Ik Cho
2008 A* conf
From SODA to scotch: The evolution of a wireless baseband processor.
MICRO
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztián Flautner
2007 J jnl
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends.
IEEE Trans. Very Large Scale Integr. Syst.
Ye Li, Bertan Bakkaloglu, Chaitali Chakrabarti
2007 J jnl
Automatic antenna-tuning unit for software-defined and cognitive radio.
Wirel. Commun. Mob. Comput.
Sung-Hoon Oh, Hang Song, James T. Aberle, Bertan Bakkaloglu, Chaitali Chakrabarti
2007 — conf
Design and Analysis of LDPC Decoders for Software Defined Radio.
SiPS
Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali Chakrabarti
2007 A conf
Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering.
ICCAD
Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy, Chaitali Chakrabarti
2007 A* conf
Dynamic Power Management with Hybrid Power Sources.
DAC
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang
2007 — conf
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations.
SiPS
Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan
2007 A conf
Energy management of DVS-DPM enabled embedded systems powered by fuel cell-battery hybrid source.
ISLPED
Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang
2007 — conf
Memory Efficient LDPC Code Design for High Throughput Software Defined Radio (SDR) systems.
ICASSP (2)
Yuming Zhu, Chaitali Chakrabarti
2007 J jnl
SODA: A High-Performance DSP Architecture for Software-Defined Radio.
IEEE Micro
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
2007 — conf
Sphere Decoding for Multiprocessor Architectures.
SiPS
Qi Qi, Chaitali Chakrabarti
2007 B conf
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms.
FPL
Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2007 — conf
The Next Generation Challenge for Software Defined Radio.
SAMOS
Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
2007 A conf
Throughput of multi-core processors under thermal constraints.
ISLPED
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti
2006 J jnl
A Survey on Lifting-based Discrete Wavelet Transform Architectures.
J. VLSI Signal Process.
Tinku Acharya, Chaitali Chakrabarti
2006 J jnl
A coprocessor architecture for fast protein structure prediction.
Pattern Recognit.
Rahim Khoja, Mehul Marolia, Tinku Acharya, Chaitali Chakrabarti
2006 — conf
Aggregated Circulant Matrix Based LDPC Codes.
ICASSP (3)
Yuming Zhu, Chaitali Chakrabarti
2006 A conf
An optimal analytical solution for processor speed control with thermal constraints.
ISLPED
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang
2006 — conf
Architecture-Aware LDPC Code Design for Software Defined Radio.
SiPS
Yuming Zhu, Chaitali Chakrabarti
2006 — conf
Design and Implementation of Turbo Decoders for Software Defined Radio.
SiPS
Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner
2006 A* conf
Extending the lifetime of fuel cell based hybrid systems.
DAC
Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula
2006 — conf
Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations.
SoCC
G. Chen, Liping Xue, Jungsub Kim, Kanwaldeep Sobti, Lanping Deng, Xiaobai Sun, Nikos Pitsianis, Chaitali Chakrabarti, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2006 A* conf
High-level power management of embedded systems with application-specific energy cost functions.
DAC
Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Sarma B. K. Vrudhula
2006 A conf
Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids.
ISLPED
Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula
2006 A conf
Reducing idle mode power in software defined radio terminals.
ISLPED
Hyunseok Lee, Trevor N. Mudge, Chaitali Chakrabarti
2006 A* conf
SODA: A Low-power Architecture For Software Radio.
ISCA
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
2006 J jnl
Study of energy and performance of space-time decoding systems in concatenation with turbo decoding.
IEEE Trans. Very Large Scale Integr. Syst.
Yuming Zhu, L. Li, Chaitali Chakrabarti
2005 — conf
A Unified Bayesian Decision Theory Perspective to Sensor Networks.
ISIC
Amit S. Chhetri, Darryl Morrell, Antonia Papandreou-Suppappola, Chaitali Chakrabarti, Andreas Spanias, Jun Jason Zhang
2005 J jnl
An Efficient Control Point Insertion Technique for Leakage Reduction of Scaled CMOS Circuits.
IEEE Trans. Circuits Syst. II Express Briefs
Hafijur Rahman, Chaitali Chakrabarti
2005 — conf
An efficient dynamic task scheduling algorithm for battery powered DVS systems.
ASP-DAC
Jianli Zhuo, Chaitali Chakrabarti
2005 J jnl
Memory sub-banking scheme for high throughput MAP-based SISO decoders.
IEEE Trans. Very Large Scale Integr. Syst.
Mayank Tiwari, Yuming Zhu, Chaitali Chakrabarti
2005 J jnl
Static task-scheduling algorithms for battery-powered DVS systems.
IEEE Trans. Very Large Scale Integr. Syst.
Princey Chowdhury, Chaitali Chakrabarti
2005 A* conf
System-level energy-efficient dynamic task scheduling.
DAC
Jianli Zhuo, Chaitali Chakrabarti
2004 — conf
A dynamic task scheduling algorithm for battery powered DVS systems.
ISCAS (2)
Jameel Ahmed, Chaitali Chakrabarti
2004 — conf
A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage.
ISCAS (2)
Hafijur Rahman, Chaitali Chakrabarti
2004 J jnl
An approach for adaptively approximating the Viterbi algorithm to reduce power consumption while decoding convolutional codes.
IEEE Trans. Signal Process.
Russell E. Henning, Chaitali Chakrabarti
2004 J jnl
Design and implementation of low-energy turbo decoders.
IEEE Trans. Very Large Scale Integr. Syst.
J. Kaza, Chaitali Chakrabarti
2004 — conf
Memory sub-banking scheme for high throughput turbo decoder.
ICASSP (5)
Mayank Tiwari, Yuming Zhu, Chaitali Chakrabarti
2004 J jnl
Mobile Supercomputers.
Computer
Todd M. Austin, David T. Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne H. Wolf
2004 J jnl
Multi-Module Multi-Port Memory Design for Low Power Embedded Systems.
Des. Autom. Embed. Syst.
Wen-Tsong Shiue, Chaitali Chakrabarti
2004 — conf
Optimum Buffer Size for Dynamic Voltage Processors.
PATMOS
Ali Manzak, Chaitali Chakrabarti
2004 — conf
Parameterized SoC design for portable systems.
ISCAS (2)
Sumant Bhutoria, Chaitali Chakrabarti
2003 J jnl
A high-performance JPEG2000 architecture.
IEEE Trans. Circuits Syst. Video Technol.
Kishore Andra, Chaitali Chakrabarti, Tinku Acharya
2003 J jnl
Variable voltage task scheduling algorithms for minimizing energy/power.
IEEE Trans. Very Large Scale Integr. Syst.
Ali Manzak, Chaitali Chakrabarti
2002 J jnl
A VLSI architecture for lifting-based forward and inverse wavelet transform.
IEEE Trans. Signal Process.
Kishore Andra, Chaitali Chakrabarti, Tinku Acharya
2002 — conf
A high performance JPEG2000 architecture.
ISCAS (1)
Kishore Andra, Chaitali Chakrabarti, Tinku Acharya
2002 J jnl
A low power scheduling scheme with resources operating at multiple voltages.
IEEE Trans. Very Large Scale Integr. Syst.
Ali Manzak, Chaitali Chakrabarti
2002 — conf
Architectural approaches to reduce leakage energy in caches.
ISCAS (1)
S. H. Tadas, Chaitali Chakrabarti
2002 A* conf
Battery-conscious task sequencing for portable devices including voltage/clock scaling.
DAC
Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti
2002 Misc conf
Energy-efficient turbo decoder.
ICASSP
Jagadeesh Kaza, Chaitali Chakrabarti
2002 A conf
Low-power approach for decoding convolutional codes with adaptive viterbi algorithm approximations.
ISLPED
Russell E. Henning, Chaitali Chakrabarti
2001 A* conf
Address Code Generation for Digital Signal Processors.
DAC
Sathishkumar Udayanarayanan, Chaitali Chakrabarti
2001 Misc conf
An approach for enabling DCT/IDCT energy reduction scalability in MPEG-2 video codecs.
ICASSP
Russell E. Henning, Chaitali Chakrabarti
2001 J jnl
Data memory design and exploration for low-power embedded systems.
ACM Trans. Design Autom. Electr. Syst.
Wen-Tsong Shiue, Sathishkumar Udayanarayanan, Chaitali Chakrabarti
2001 Misc conf
Efficient implementation of a set of lifting based wavelet filters.
ICASSP
Kishore Andra, Chaitali Chakrabarti, Tinku Acharya
2001 A conf
Variable voltage task scheduling algorithms for minimizing energy.
ISLPED
Ali Manzak, Chaitali Chakrabarti
2001 C conf
Voltage Scaling for Energy Minimization with QoS Constraints.
ICCD
Ali Manzak, Chaitali Chakrabarti
2000 B conf
A Multi-Bit Binary Arithmetic Coding Technique.
ICIP
Kishore Andra, Tinku Acharya, Chaitali Chakrabarti
2000 C conf
A programmable processor for cryptography.
ISCAS
Sukumar S. Raghuram, Chaitali Chakrabarti
2000 A conf
Energy-efficient code generation for DSP56000 family (poster session).
ISLPED
Sathishkumar Udayanarayanan, Chaitali Chakrabarti
2000 C conf
ILP-based scheme for low power scheduling and resource binding.
ISCAS
Wen-Tsong Shiue, Chaitali Chakrabarti
2000 Misc conf
Relating Data Characteristics to Transition Activity in High-Level Static CMOS Design.
VLSI Design
Russell E. Henning, Chaitali Chakrabarti
2000 J jnl
VLSI architectures for weighted order statistic (WOS) filters.
Signal Process.
Chaitali Chakrabarti, Lori E. Lucke
2000 Misc conf
Variable voltage task scheduling for minimizing energy or minimizing power.
ICASSP
Ali Manzak, Chaitali Chakrabarti
1999 — conf
A DWT-based encoder architecture for symmetrically extended images.
ISCAS (4)
Chaitali Chakrabarti
1999 — conf
A low power scheduling scheme with resources operating at multiple voltages.
ISCAS (1)
Ali Manzak, Chaitali Chakrabarti
1999 Misc conf
Activity models for use in low power, high-level synthesis.
ICASSP
Russell E. Henning, Chaitali Chakrabarti
1999 J jnl
Efficient realizations of encoders and decoders based on the 2-D discrete wavelet transform.
IEEE Trans. Very Large Scale Integr. Syst.
Chaitali Chakrabarti, Clint Mumford
1999 — conf
Instruction level power model of microcontrollers.
ISCAS (1)
Chaitali Chakrabarti, Dinesh Gaitonde
1999 A* conf
Memory Exploration for Low Power, Embedded Systems.
DAC
Wen-Tsong Shiue, Chaitali Chakrabarti
1999 — conf
Memory exploration for low power embedded systems.
ISCAS (1)
Wen-Tsong Shiue, Chaitali Chakrabarti
1997 C conf
High-Level Design Synthesis of a Low Power, VLIW Processor for the IS-54 VSELP Speech Encoder.
ICCD
Russell E. Henning, Chaitali Chakrabarti
1996 J jnl
A new architecture for the Viterbi decoder for code rate k/n.
IEEE Trans. Commun.
Hsiang-Ling Li, Chaitali Chakrabarti
1996 J jnl
Architectures for wavelet transforms: A survey.
J. VLSI Signal Process.
Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens
1996 Misc conf
Efficient realizations of analysis and synthesis filters based on the 2-D discrete wavelet transform.
ICASSP
Chaitali Chakrabarti, Clint Mumford
1996 J jnl
Motion estimation of two-dimensional objects based on the straight line hough transform: A new approach.
Pattern Recognit.
Hsiang-Ling Li, Chaitali Chakrabarti
1995 J jnl
A New Architecture for the Viterbi Decoder for Code Rate k/n1.
IEEE Trans. Commun.
Hsiang-Ling Li, Chaitali Chakrabarti
1995 C conf
A New Viterbi Decoder Design for Code Rate
ISCAS
Hsiang-Ling Li, Chaitali Chakrabarti
1995 J jnl
A digit-serial architecture for gray-scale morphological filtering.
IEEE Trans. Image Process.
Lori Lucke, Chaitali Chakrabarti
1995 Misc conf
A new Viterbi decoder design for code rate k/n.
ICASSP
Hsiang-Ling Li, Chaitali Chakrabarti
1995 Misc conf
A survey of architectures for the discrete and continuous wavelet transforms.
ICASSP
Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens
1995 J jnl
Architectures for hierarchical and other block matching algorithms.
IEEE Trans. Circuits Syst. Video Technol.
Gagan Gupta, Chaitali Chakrabarti
1995 J jnl
Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers.
IEEE Trans. Signal Process.
Chaitali Chakrabarti, Mohan Vishwanath
1995 C conf
Low power data format converter design using semi-static register allocation.
ICCD
Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke
1994 C conf
A Digit-Serial Architecture for Gray-Scale Morphological Filtering.
ISCAS
Lori Lucke, Chaitali Chakrabarti
1994 — conf
A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform.
ICASSP (2)
Mohan Vishwanath, Chaitali Chakrabarti
1994 J jnl
A comment on 'on prime factor mapping for the discrete Hartley transform'.
IEEE Trans. Signal Process.
Chaitali Chakrabarti
1994 — conf
Efficient Architectures for Hidden Surface Removal.
ICIP (1)
Chaitali Chakrabarti, Lori Lucke
1994 C conf
High Sample Rate Architectures for Block Adaptive Filters.
ISCAS
Srikanth Karkada, Chaitali Chakrabarti, Andreas Spanias
1994 J jnl
High sample rate array architectures for median filters.
IEEE Trans. Signal Process.
Chaitali Chakrabarti
1994 C conf
Novel Sorting Netowrk-Based Architectures for Rank Order Filters.
ISCAS
Chaitali Chakrabarti, Li-Yu Wang
1994 J jnl
Novel sorting network-based architectures for rank order filters.
IEEE Trans. Very Large Scale Integr. Syst.
Chaitali Chakrabarti, Li-Yu Wang
1994 C conf
VLSI Architectures for Hierarchical Block Matching.
ISCAS
Gagan Gupta, Chaitali Chakrabarti
1993 J jnl
Comments on 'Highly modular systolic structures for denominator-separable 2-D recursive filters' [and reply].
IEEE Trans. Signal Process.
Chaitali Chakrabarti, D. Raghuramireddy, Rolf Unbehauen
1993 C conf
Efficient stack filter implementations of rank order filters.
ISCAS
Chaitali Chakrabarti
1993 — conf
VLSI architectures for recursive median filters.
ICASSP (1)
Chaitali Chakrabarti
1991 J jnl
VLSI Architectures for Multidimensional Transforms.
IEEE Trans. Computers
Chaitali Chakrabarti, Joseph F. JáJá
1990 — conf
A parallel algorithm for template matching on an SIMD mesh connected computer.
ICPR (2)
Chaitali Chakrabarti, Joseph F. JáJá
1990 J jnl
Systolic Architectures for the Computation of the Discrete Hartley and the Discrete Cosine Transforms Based on Prime Factor Decomposition.
IEEE Trans. Computers
Chaitali Chakrabarti, Joseph F. JáJá
1990 — —
VLSI Architectures for Real-Time Signal Processing.
Chaitali Chakrabarti