Cees-Bart Breunesse

12 papers A* 1C 1Misc 1Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2024 J jnl
Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis.
IEEE Trans. Emerg. Top. Comput.
Pantea Kiaei, Yuan Yao, Zhenyuan Liu, Nicole Fern, Cees-Bart Breunesse, Jasper Van Woudenberg, Kate Gillis, Alex Dich, Peter Grossmann, Patrick Schaumont
2024 C conf
Improving CPU Fault Injection Simulations: Insights from RTL to Instruction-Level Models.
FDTC
Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Dennis Vermoen Riscure
2023 Misc conf
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.
VTS
Sohrab Aftabjahani, Mark Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein
2022 J jnl
Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis.
CoRR
Pantea Kiaei, Yuan Yao, Zhenyuan Liu, Nicole Fern, Cees-Bart Breunesse, Jasper Van Woudenberg, Kate Gillis, Alex Dich, Peter Grossmann, Patrick Schaumont
2021 A* conf
Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection.
DAC
Pantea Kiaei, Cees-Bart Breunesse, Mohsen Ahmadi, Patrick Schaumont, Jasper Van Woudenberg
2020 J jnl
Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection.
CoRR
Pantea Kiaei, Cees-Bart Breunesse, Mohsen Ahmadi, Patrick Schaumont, Jasper Van Woudenberg
2020 — conf
Verification of Power-based Side-channel Leakage through Simulation.
MWSCAS
Yuan Yao, Patrick Schaumont, Jasper Van Woudenberg, Cees-Bart Breunesse, Edgar Mateos Santillan, Steve Stecyk
2020 — conf
Verification of Power-based Side-channel Leakage through Simulation.
MWSCAS
Yuan Yao, Patrick Schaumont, Jasper Van Woudenberg, Cees-Bart Breunesse, Edgar Mateos Santillan, Steve Stecyk
2018 J jnl
Towards Fully Automated Analysis of Whiteboxes: Perfect Dimensionality Reduction for Perfect Leakage.
IACR Cryptol. ePrint Arch.
Cees-Bart Breunesse, Ilya Kizhvatov, Ruben Muijrers, Albert Spruyt
2006 — —
On JML: topics in tool-assisted verification of Java programs.
Cees-Bart Breunesse
2005 J jnl
Formal methods for smart cards: an experience report.
Sci. Comput. Program.
Cees-Bart Breunesse, Néstor Cataño, Marieke Huisman, Bart Jacobs
2002 — conf
Specifying and Verifying a Decimal Representation in Java for Smart Cards.
AMAST
Cees-Bart Breunesse, Bart Jacobs, Joachim van den Berg