Carlos Jesús Jiménez-Fernández

25 papers A 1B 1C 3Journal 12Unranked 7
YearRankTypeTitle / Venue / Authors
2025 — conf
A Lightweight AES Peripheral for RISC-V Cores and IoT Applications.
DCIS
Carlos Fernández-García, Carmen Baena Oliva, Pilar Parra Fernández, Carlos Jesús Jiménez-Fernández
2024 — conf
Cryptographic Security Through a Hardware Root of Trust.
ARC
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox
2024 J jnl
TinyJAMBU Hardware Implementation for Low Power.
IEEE Access
Carlos Fernández García, José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández
2022 J jnl
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher.
IEEE Access
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves
2021 J jnl
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations.
Sensors
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
2021 J jnl
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA.
IEEE Access
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
2020 J jnl
ASIC Design and Power Characterization of Standard and Low Power Multi-Radix Trivium.
IEEE Trans. Circuits Syst.
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2020 J jnl
An Academic Approach to FPGA Design Based on a Distance Meter Circuit.
Rev. Iberoam. de Tecnol. del Aprendiz.
Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero
2020 J jnl
Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA.
Sensors
Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero, Carmen Baena Oliva, Pilar Parra Fernández, Carlos Jesús Jiménez-Fernández
2020 C conf
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers.
ISCAS
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández
2018 — conf
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher.
DCIS
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Manuel Valencia-Barrero
2017 J jnl
Multiradix Trivium Implementations for Low-Power IoT Hardware.
IEEE Trans. Very Large Scale Integr. Syst.
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2017 J jnl
Power and Energy Issues on Lightweight Cryptography.
J. Low Power Electron.
Antonio J. Acosta, Erica Tena-Sánchez, Carlos Jesús Jiménez-Fernández, Javier M. Mora-Merchan
2017 J jnl
Trivium hardware implementations for power reduction.
Int. J. Circuit Theory Appl.
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2017 J jnl
Vulnerability Analysis of Trivium FPGA Implementations.
IEEE Trans. Very Large Scale Integr. Syst.
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2016 C conf
Fault attack on FPGA implementations of Trivium stream cipher.
ISCAS
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2013 J jnl
A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions.
IEEE Trans. Circuits Syst. I Regul. Pap.
Piedad Brox, Javier Castro-Ramirez, Macarena C. Martínez-Rodríguez, Erica Tena, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Antonio J. Acosta
2012 — conf
Low Power Implementation of Trivium Stream Cipher.
PATMOS
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2008 — ch.
Logic Synthesis.
Wiley Encyclopedia of Computer Science and Engineering
Angel Barriga, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
2002 B conf
Hardware/software codesign methodology for fuzzy controller implementation.
FUZZ-IEEE
Alejandro Cabrera, Santiago Sánchez-Solano, Raouf Senhadji, Angel Barriga, Carlos Jesús Jiménez-Fernández
2002 — conf
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level.
PATMOS
Carmen Baena Oliva, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos Jesús Jiménez-Fernández, Manuel Valencia
2002 C conf
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards.
IEEE International Workshop on Rapid System Prototyping
Santiago Sánchez-Solano, Raouf Senhadji, Alejandro Cabrera Sarmiento, Iluminada Baturone, Carlos Jesús Jiménez-Fernández, Angel Barriga
1998 — conf
A design methodology for application specific fuzzy integrated circuits.
ICECS
Angel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano
1998 A conf
XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers.
DATE
E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga
1995 — conf
VHDL package for description of fuzzy logic controllers.
EURO-DAC
D. Galán, Carlos Jesús Jiménez-Fernández, Angel Barriga, Santiago Sánchez-Solano